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| 1 | +#include "pins_arduino.h" |
| 2 | + |
| 3 | +#include "gd32vf103_libopt.h" |
| 4 | + |
| 5 | + |
| 6 | + |
| 7 | +gpio_dev_t gpioa = { |
| 8 | + .gpio_port = GPIOA, |
| 9 | + .clk_id = RCU_GPIOA, |
| 10 | +}; |
| 11 | + |
| 12 | +gpio_dev_t * const GPIO_A = &gpioa; |
| 13 | + |
| 14 | +gpio_dev_t gpiob = { |
| 15 | + .gpio_port = GPIOB, |
| 16 | + .clk_id = RCU_GPIOB, |
| 17 | +}; |
| 18 | + |
| 19 | +gpio_dev_t * const GPIO_B = &gpiob; |
| 20 | + |
| 21 | +gpio_dev_t gpioc = { |
| 22 | + .gpio_port = GPIOC, |
| 23 | + .clk_id = RCU_GPIOC, |
| 24 | +}; |
| 25 | + |
| 26 | +gpio_dev_t * const GPIO_C = &gpioc; |
| 27 | + |
| 28 | +gpio_dev_t gpiod = { |
| 29 | + .gpio_port = GPIOD, |
| 30 | + .clk_id = RCU_GPIOD, |
| 31 | +}; |
| 32 | + |
| 33 | +gpio_dev_t * const GPIO_D = &gpiod; |
| 34 | + |
| 35 | +gpio_dev_t gpioe = { |
| 36 | + .gpio_port = GPIOE, |
| 37 | + .clk_id = RCU_GPIOE, |
| 38 | +}; |
| 39 | +gpio_dev_t * const GPIO_E = &gpioe; |
| 40 | + |
| 41 | +adc_dev_t adc0 = { |
| 42 | + .adc_dev = ADC0, |
| 43 | + .clk_id = RCU_ADC0, |
| 44 | +}; |
| 45 | +adc_dev_t * const ADC_0 = &adc0; |
| 46 | + |
| 47 | +// TODO: add timer remap descriptor |
| 48 | + |
| 49 | +timer_dev_t timer0 = { |
| 50 | + .timer_dev = TIMER0, |
| 51 | + .clk_id = RCU_TIMER0, |
| 52 | +}; |
| 53 | +timer_dev_t * const TIMER_0 = &timer0; |
| 54 | + |
| 55 | +timer_dev_t timer1 = { |
| 56 | + .timer_dev = TIMER1, |
| 57 | + .clk_id = RCU_TIMER1, |
| 58 | +}; |
| 59 | +timer_dev_t * const TIMER_1 = &timer1; |
| 60 | + |
| 61 | +timer_dev_t timer2 = { |
| 62 | + .timer_dev = TIMER2, |
| 63 | + .clk_id = RCU_TIMER2, |
| 64 | +}; |
| 65 | +timer_dev_t * const TIMER_2 = &timer2; |
| 66 | + |
| 67 | +timer_dev_t timer3 = { |
| 68 | + .timer_dev = TIMER3, |
| 69 | + .clk_id = RCU_TIMER3, |
| 70 | +}; |
| 71 | +timer_dev_t * const TIMER_3 = &timer3; |
| 72 | + |
| 73 | +timer_dev_t timer4 = { |
| 74 | + .timer_dev = TIMER4, |
| 75 | + .clk_id = RCU_TIMER4, |
| 76 | +}; |
| 77 | +timer_dev_t * const TIMER_4 = &timer4; |
| 78 | + |
| 79 | +spi_dev_t spi0 = { |
| 80 | + .spi_dev = SPI0, |
| 81 | + .clk_id = RCU_SPI0, |
| 82 | +}; |
| 83 | +spi_dev_t * const SPI_0 = &spi0; |
| 84 | + |
| 85 | +spi_dev_t spi1 = { |
| 86 | + .spi_dev = SPI1, |
| 87 | + .clk_id = RCU_SPI1, |
| 88 | +}; |
| 89 | +spi_dev_t * const SPI_1 = &spi1; |
| 90 | + |
| 91 | +spi_dev_t spi2 = { |
| 92 | + .spi_dev = SPI2, |
| 93 | + .clk_id = RCU_SPI2, |
| 94 | +}; |
| 95 | +spi_dev_t * const SPI_2 = &spi2; |
| 96 | + |
| 97 | +const gd32v_pin_info_t PIN_MAP[VARIANT_GPIO_NUM] = { |
| 98 | +/* |
| 99 | + gpio_dev *gpio_device; GPIO device |
| 100 | + timer_dev *timer_device; Pin's timer device, if any. |
| 101 | + const adc_dev *adc_device; ADC device, if any. |
| 102 | + uint8 gpio_bit; Pin's GPIO port bit. |
| 103 | + uint8 timer_channel; Timer channel, or 0 if none. |
| 104 | + uint8 adc_channel; Pin ADC channel, or ADCx if none. |
| 105 | +*/ |
| 106 | + {&gpioa, &timer1, &adc0, 0, 0, 0, 0, EXTI0_IRQn}, /* PA0 */ |
| 107 | + {&gpioa, &timer1, &adc0, 0, 1, 1, 1, EXTI1_IRQn}, /* PA1 */ |
| 108 | + {&gpioa, &timer1, &adc0, 0, 2, 2, 2, EXTI2_IRQn}, /* PA2 */ |
| 109 | + {&gpioa, &timer1, &adc0, 0, 3, 3, 3, EXTI3_IRQn}, /* PA3 */ |
| 110 | + {&gpioa, 0, &adc0, &spi0, 4, 0, 4, EXTI4_IRQn}, /* PA4 */ |
| 111 | + {&gpioa, 0, &adc0, &spi0, 5, 0, 5, EXTI5_9_IRQn}, /* PA5 */ |
| 112 | + {&gpioa, &timer2, &adc0, &spi0, 6, 0, 6, EXTI5_9_IRQn}, /* PA6 */ |
| 113 | + {&gpioa, &timer2, &adc0, &spi0, 7, 1, 7, EXTI5_9_IRQn}, /* PA7 */ |
| 114 | + {&gpioa, &timer0, 0, 0, 8, 0, 0, EXTI5_9_IRQn}, /* PA8 */ |
| 115 | + {&gpioa, &timer0, 0, 0, 9, 1, 0, EXTI5_9_IRQn}, /* PA9 */ |
| 116 | + {&gpioa, &timer0, 0, 0, 10, 2, 0, EXTI10_15_IRQn}, /* PA10 */ |
| 117 | + {&gpioa, &timer0, 0, 0, 11, 3, 0, EXTI10_15_IRQn}, /* PA11 */ |
| 118 | + {&gpioa, 0, 0, 0, 12, 0, 0, EXTI10_15_IRQn}, /* PA12 */ |
| 119 | + {&gpioa, 0, 0, 0, 13, 0, 0, EXTI10_15_IRQn}, /* PA13 */ |
| 120 | + {&gpioa, 0, 0, 0, 14, 0, 0, EXTI10_15_IRQn}, /* PA14 */ |
| 121 | + {&gpioa, 0, 0, &spi2, 15, 0, 0, EXTI10_15_IRQn}, /* PA15 */ |
| 122 | + |
| 123 | + {&gpiob, &timer2, &adc0, 0, 0, 2, 8, EXTI0_IRQn}, /* PB0 */ |
| 124 | + {&gpiob, &timer2, &adc0, 0, 1, 3, 9, EXTI1_IRQn}, /* PB1 */ |
| 125 | + {&gpiob, 0, 0, 0, 2, 0, 0, EXTI2_IRQn}, /* PB2 */ |
| 126 | + {&gpiob, 0, 0, &spi2, 3, 0, 0, EXTI3_IRQn}, /* PB3 */ |
| 127 | + {&gpiob, 0, 0, &spi2, 4, 0, 0, EXTI4_IRQn}, /* PB4 */ |
| 128 | + {&gpiob, 0, 0, &spi2, 5, 0, 0, EXTI5_9_IRQn}, /* PB5 */ |
| 129 | + {&gpiob, &timer3, 0, 0, 6, 0, 0, EXTI5_9_IRQn}, /* PB6 */ |
| 130 | + {&gpiob, &timer3, 0, 0, 7, 1, 0, EXTI5_9_IRQn}, /* PB7 */ |
| 131 | + {&gpiob, &timer3, 0, 0, 8, 2, 0, EXTI5_9_IRQn}, /* PB8 */ |
| 132 | + {&gpiob, &timer3, 0, 0, 9, 3, 0, EXTI5_9_IRQn}, /* PB9 */ |
| 133 | + {&gpiob, 0, 0, 0, 10, 0, 0, EXTI10_15_IRQn}, /* PB10 */ |
| 134 | + {&gpiob, 0, 0, 0, 11, 0, 0, EXTI10_15_IRQn}, /* PB11 */ |
| 135 | + {&gpiob, 0, 0, &spi1, 12, 0, 0, EXTI10_15_IRQn}, /* PB12 */ |
| 136 | + {&gpiob, 0, 0, &spi1, 13, 0, 0, EXTI10_15_IRQn}, /* PB13 */ |
| 137 | + {&gpiob, 0, 0, &spi1, 14, 0, 0, EXTI10_15_IRQn}, /* PB14 */ |
| 138 | + {&gpiob, 0, 0, &spi1, 15, 0, 0, EXTI10_15_IRQn}, /* PB15 */ |
| 139 | + |
| 140 | + {&gpioc, 0, &adc0, 0, 0, 0, 10, EXTI0_IRQn}, /* PC0 */ |
| 141 | + {&gpioc, 0, &adc0, 0, 1, 0, 11, EXTI1_IRQn}, /* PC1 */ |
| 142 | + {&gpioc, 0, &adc0, 0, 2, 0, 12, EXTI2_IRQn}, /* PC2 */ |
| 143 | + {&gpioc, 0, &adc0, 0, 3, 0, 13, EXTI3_IRQn}, /* PC3 */ |
| 144 | + {&gpioc, 0, &adc0, 0, 4, 0, 14, EXTI4_IRQn}, /* PC4 */ |
| 145 | + {&gpioc, 0, &adc0, 0, 5, 0, 15, EXTI5_9_IRQn}, /* PC5 */ |
| 146 | + {&gpioc, 0, 0, 0, 6, 0, 0, EXTI5_9_IRQn}, /* PC6 */ |
| 147 | + {&gpioc, 0, 0, 0, 7, 0, 0, EXTI5_9_IRQn}, /* PC7 */ |
| 148 | + {&gpioc, 0, 0, 0, 8, 0, 0, EXTI5_9_IRQn}, /* PC8 */ |
| 149 | + {&gpioc, 0, 0, 0, 9, 0, 0, EXTI5_9_IRQn}, /* PC9 */ |
| 150 | + {&gpioc, 0, 0, 0, 10, 0, 0, EXTI10_15_IRQn}, /* PC10 */ |
| 151 | + {&gpioc, 0, 0, 0, 11, 0, 0, EXTI10_15_IRQn}, /* PC11 */ |
| 152 | + {&gpioc, 0, 0, 0, 12, 0, 0, EXTI10_15_IRQn}, /* PC12 */ |
| 153 | + {&gpioc, 0, 0, 0, 13, 0, 0, EXTI10_15_IRQn}, /* PC13 */ |
| 154 | + {&gpioc, 0, 0, 0, 14, 0, 0, EXTI10_15_IRQn}, /* PC14 */ |
| 155 | + {&gpioc, 0, 0, 0, 15, 0, 0, EXTI10_15_IRQn}, /* PC15 */ |
| 156 | + |
| 157 | + {&gpiod, 0, 0, 0, 0, 0, 0, EXTI0_IRQn}, /* PD0 */ |
| 158 | + {&gpiod, 0, 0, 0, 1, 0, 0, EXTI1_IRQn}, /* PD1 */ |
| 159 | + {&gpiod, 0, 0, 0, 2, 0, 0, EXTI2_IRQn}, /* PD2 */ |
| 160 | + {&gpiod, 0, 0, 0, 3, 0, 0, EXTI3_IRQn}, /* PD3 */ |
| 161 | + {&gpiod, 0, 0, 0, 4, 0, 0, EXTI4_IRQn}, /* PD4 */ |
| 162 | + {&gpiod, 0, 0, 0, 5, 0, 0, EXTI5_9_IRQn}, /* PD5 */ |
| 163 | + {&gpiod, 0, 0, 0, 6, 0, 0, EXTI5_9_IRQn}, /* PD6 */ |
| 164 | + {&gpiod, 0, 0, 0, 7, 0, 0, EXTI5_9_IRQn}, /* PD7 */ |
| 165 | + {&gpiod, 0, 0, 0, 8, 0, 0, EXTI5_9_IRQn}, /* PD8 */ |
| 166 | + {&gpiod, 0, 0, 0, 9, 0, 0, EXTI5_9_IRQn}, /* PD9 */ |
| 167 | + {&gpiod, 0, 0, 0, 10, 0, 0, EXTI10_15_IRQn}, /* PD10 */ |
| 168 | + {&gpiod, 0, 0, 0, 11, 0, 0, EXTI10_15_IRQn}, /* PD11 */ |
| 169 | + {&gpiod, 0, 0, 0, 12, 0, 0, EXTI10_15_IRQn}, /* PD12 */ |
| 170 | + {&gpiod, 0, 0, 0, 13, 0, 0, EXTI10_15_IRQn}, /* PD13 */ |
| 171 | + {&gpiod, 0, 0, 0, 14, 0, 0, EXTI10_15_IRQn}, /* PD14 */ |
| 172 | + {&gpiod, 0, 0, 0, 15, 0, 0, EXTI10_15_IRQn}, /* PD15 */ |
| 173 | + |
| 174 | + {&gpioe, 0, 0, 0, 0, 0, 0, EXTI0_IRQn}, /* PE0 */ |
| 175 | + {&gpioe, 0, 0, 0, 1, 0, 0, EXTI1_IRQn}, /* PE1 */ |
| 176 | + {&gpioe, 0, 0, 0, 2, 0, 0, EXTI2_IRQn}, /* PE2 */ |
| 177 | + {&gpioe, 0, 0, 0, 3, 0, 0, EXTI3_IRQn}, /* PE3 */ |
| 178 | + {&gpioe, 0, 0, 0, 4, 0, 0, EXTI4_IRQn}, /* PE4 */ |
| 179 | + {&gpioe, 0, 0, 0, 5, 0, 0, EXTI5_9_IRQn}, /* PE5 */ |
| 180 | + {&gpioe, 0, 0, 0, 6, 0, 0, EXTI5_9_IRQn}, /* PE6 */ |
| 181 | + {&gpioe, 0, 0, 0, 7, 0, 0, EXTI5_9_IRQn}, /* PE7 */ |
| 182 | + {&gpioe, 0, 0, 0, 8, 0, 0, EXTI5_9_IRQn}, /* PE8 */ |
| 183 | + {&gpioe, 0, 0, 0, 9, 0, 0, EXTI5_9_IRQn}, /* PE9 */ |
| 184 | + {&gpioe, 0, 0, 0, 10, 0, 0, EXTI10_15_IRQn}, /* PE10 */ |
| 185 | + {&gpioe, 0, 0, 0, 11, 0, 0, EXTI10_15_IRQn}, /* PE11 */ |
| 186 | + {&gpioe, 0, 0, 0, 12, 0, 0, EXTI10_15_IRQn}, /* PE12 */ |
| 187 | + {&gpioe, 0, 0, 0, 13, 0, 0, EXTI10_15_IRQn}, /* PE13 */ |
| 188 | + {&gpioe, 0, 0, 0, 14, 0, 0, EXTI10_15_IRQn}, /* PE14 */ |
| 189 | + {&gpioe, 0, 0, 0, 15, 0, 0, EXTI10_15_IRQn}, /* PE15 */ |
| 190 | +}; |
| 191 | + |
| 192 | + |
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