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First version of the overlay tutorial support files
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build_all.tcl

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cd ip
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foreach script [glob */script.tcl] { exec vivado_hls -f $script }
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cd ../overlays
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source tutorial_1.tcl
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add_files -norecurse [make_wrapper -files [get_files *.bd] -top]
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update_compile_order -fileset sources_1
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set_property top tutorial_1_wrapper [current_fileset]
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launch_runs impl_1 -to_step write_bitstream
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wait_on_run impl_1
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file copy -force tutorial_1/tutorial_1.runs/impl_1/tutorial_1_wrapper.bit tutorial_1.bit
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close_project
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source tutorial_2.tcl
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add_files -norecurse [make_wrapper -files [get_files *.bd] -top]
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update_compile_order -fileset sources_1
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set_property top tutorial_2_wrapper [current_fileset]
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launch_runs impl_1 -to_step write_bitstream
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wait_on_run impl_1
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file copy -force tutorial_2/tutorial_2.runs/impl_1/tutorial_2_wrapper.bit tutorial_2.bit
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close_project

ip/mult_constant/mult_constant.cpp

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#include "ap_axi_sdata.h"
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#include "ap_int.h"
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typedef ap_axiu<32,1,1,1> stream_type;
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void mult_constant(stream_type* in_data, stream_type* out_data, ap_int<32> constant) {
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#pragma HLS INTERFACE s_axilite register port=constant
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#pragma HLS INTERFACE ap_ctrl_none port=return
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#pragma HLS INTERFACE axis port=in_data
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#pragma HLS INTERFACE axis port=out_data
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out_data->data = in_data->data * constant;
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out_data->dest = in_data->dest;
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out_data->id = in_data->id;
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out_data->keep = in_data->keep;
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out_data->last = in_data->last;
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out_data->strb = in_data->strb;
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out_data->user = in_data->user;
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}

ip/mult_constant/script.tcl

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open_project mult_constant
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set_top mult_constant
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add_files mult_constant/mult_constant.cpp
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open_solution "solution1"
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set_part {xc7z020clg484-1} -tool vivado
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create_clock -period 10 -name default
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#source "./mult_constant/solution1/directives.tcl"
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#csim_design
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csynth_design
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#cosim_design
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export_design -format ip_catalog -description "Multiply the stream by a user-programmable constant" -vendor "Xilinx" -display_name "Constant Multiply"
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exit

ip/scalar_add/add.cpp

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void add(int a, int b, int& c) {
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#pragma HLS INTERFACE ap_ctrl_none port=return
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#pragma HLS INTERFACE s_axilite port=a
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#pragma HLS INTERFACE s_axilite port=b
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#pragma HLS INTERFACE s_axilite port=c
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c = a + b;
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}

ip/scalar_add/script.tcl

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open_project scalar_add
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set_top add
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add_files scalar_add/add.cpp
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open_solution "solution1"
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set_part {xc7z020clg484-1} -tool vivado
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create_clock -period 10 -name default
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#source "./scalar_add/solution1/directives.tcl"
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#csim_design
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csynth_design
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#cosim_design
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export_design -format ip_catalog
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exit

overlays/tutorial_1.bit

3.86 MB
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