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More refactor
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‎LICENSE.md

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Copyright (c) 2015 Saurav Sachidanand
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Copyright (c) 2016 Saurav Sachidanand
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal

‎src/consts/irq.rs

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/*
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Copyright (c) 2016 Saurav Sachidanand
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
6+
in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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*/
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//! Interrupt Request (IRQ) Codes
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use libc::*;
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5-
pub const IRQ_INFO_EXT_IRQ : uint32_t = 0 << 8;
6-
pub const IRQ_INFO_NMI : uint32_t = 2 << 8;
7-
pub const IRQ_INFO_HARD_EXC : uint32_t = 3 << 8;
8-
pub const IRQ_INFO_SOFT_IRQ : uint32_t = 4 << 8;
9-
pub const IRQ_INFO_PRIV_SOFT_EXC: uint32_t = 5 << 8;
10-
pub const IRQ_INFO_SOFT_EXC : uint32_t = 6 << 8;
11-
pub const IRQ_INFO_ERROR_VALID : uint32_t = 1 << 11;
12-
pub const IRQ_INFO_VALID : uint32_t = 1 << 31;
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pub const IRQ_INFO_EXT_IRQ : uint32_t = 0 << 8;
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pub const IRQ_INFO_NMI : uint32_t = 2 << 8;
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pub const IRQ_INFO_HARD_EXC : uint32_t = 3 << 8;
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pub const IRQ_INFO_SOFT_IRQ : uint32_t = 4 << 8;
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pub const IRQ_INFO_PRIV_SOFT_EXC : uint32_t = 5 << 8;
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pub const IRQ_INFO_SOFT_EXC : uint32_t = 6 << 8;
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pub const IRQ_INFO_ERROR_VALID : uint32_t = 1 << 11;
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pub const IRQ_INFO_VALID : uint32_t = 1 << 31;

‎src/consts/mod.rs

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/*
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Copyright (c) 2016 Saurav Sachidanand
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
6+
in the Software without restriction, including without limitation the rights
7+
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8+
copies of the Software, and to permit persons to whom the Software is
9+
furnished to do so, subject to the following conditions:
10+
11+
The above copyright notice and this permission notice shall be included in
12+
all copies or substantial portions of the Software.
13+
14+
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15+
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16+
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17+
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18+
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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*/
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//! Some useful constants
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pub mod vmcs;

‎src/consts/vmcs.rs

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‎src/consts/vmx_cap.rs

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/*
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Copyright (c) 2016 Saurav Sachidanand
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4+
Permission is hereby granted, free of charge, to any person obtaining a copy
5+
of this software and associated documentation files (the "Software"), to deal
6+
in the Software without restriction, including without limitation the rights
7+
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8+
copies of the Software, and to permit persons to whom the Software is
9+
furnished to do so, subject to the following conditions:
10+
11+
The above copyright notice and this permission notice shall be included in
12+
all copies or substantial portions of the Software.
13+
14+
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15+
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16+
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17+
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18+
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19+
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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*/
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//! VMX capability field values
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use libc::*;
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5-
pub const PIN_BASED_INTR : uint64_t = 1 << 0;
6-
pub const PIN_BASED_NMI : uint64_t = 1 << 3;
7-
pub const PIN_BASED_VIRTUAL_NMI : uint64_t = 1 << 5;
8-
pub const PIN_BASED_PREEMPTION_TIMER : uint64_t = 1 << 6;
9-
pub const PIN_BASED_POSTED_INTR : uint64_t = 1 << 7;
27+
pub const PIN_BASED_INTR : uint64_t = 1 << 0;
28+
pub const PIN_BASED_NMI : uint64_t = 1 << 3;
29+
pub const PIN_BASED_VIRTUAL_NMI : uint64_t = 1 << 5;
30+
pub const PIN_BASED_PREEMPTION_TIMER : uint64_t = 1 << 6;
31+
pub const PIN_BASED_POSTED_INTR : uint64_t = 1 << 7;
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11-
pub const CPU_BASED_IRQ_WND : uint64_t = 1 << 2;
12-
pub const CPU_BASED_TSC_OFFSET : uint64_t = 1 << 3;
13-
pub const CPU_BASED_HLT : uint64_t = 1 << 7;
14-
pub const CPU_BASED_INVLPG : uint64_t = 1 << 9;
15-
pub const CPU_BASED_MWAIT : uint64_t = 1 << 10;
16-
pub const CPU_BASED_RDPMC : uint64_t = 1 << 11;
17-
pub const CPU_BASED_RDTSC : uint64_t = 1 << 12;
18-
pub const CPU_BASED_CR3_LOAD : uint64_t = 1 << 15;
19-
pub const CPU_BASED_CR3_STORE : uint64_t = 1 << 16;
20-
pub const CPU_BASED_CR8_LOAD : uint64_t = 1 << 19;
21-
pub const CPU_BASED_CR8_STORE : uint64_t = 1 << 20;
22-
pub const CPU_BASED_TPR_SHADOW : uint64_t = 1 << 21;
23-
pub const CPU_BASED_VIRTUAL_NMI_WND : uint64_t = 1 << 22;
24-
pub const CPU_BASED_MOV_DR : uint64_t = 1 << 23;
25-
pub const CPU_BASED_UNCOND_IO : uint64_t = 1 << 24;
26-
pub const CPU_BASED_IO_BITMAPS : uint64_t = 1 << 25;
27-
pub const CPU_BASED_MTF : uint64_t = 1 << 27;
28-
pub const CPU_BASED_MSR_BITMAPS : uint64_t = 1 << 28;
29-
pub const CPU_BASED_MONITOR : uint64_t = 1 << 29;
30-
pub const CPU_BASED_PAUSE : uint64_t = 1 << 30;
31-
pub const CPU_BASED_SECONDARY_CTLS : uint64_t = 1 << 31;
33+
pub const CPU_BASED_IRQ_WND : uint64_t = 1 << 2;
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pub const CPU_BASED_TSC_OFFSET : uint64_t = 1 << 3;
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pub const CPU_BASED_HLT : uint64_t = 1 << 7;
36+
pub const CPU_BASED_INVLPG : uint64_t = 1 << 9;
37+
pub const CPU_BASED_MWAIT : uint64_t = 1 << 10;
38+
pub const CPU_BASED_RDPMC : uint64_t = 1 << 11;
39+
pub const CPU_BASED_RDTSC : uint64_t = 1 << 12;
40+
pub const CPU_BASED_CR3_LOAD : uint64_t = 1 << 15;
41+
pub const CPU_BASED_CR3_STORE : uint64_t = 1 << 16;
42+
pub const CPU_BASED_CR8_LOAD : uint64_t = 1 << 19;
43+
pub const CPU_BASED_CR8_STORE : uint64_t = 1 << 20;
44+
pub const CPU_BASED_TPR_SHADOW : uint64_t = 1 << 21;
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pub const CPU_BASED_VIRTUAL_NMI_WND : uint64_t = 1 << 22;
46+
pub const CPU_BASED_MOV_DR : uint64_t = 1 << 23;
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pub const CPU_BASED_UNCOND_IO : uint64_t = 1 << 24;
48+
pub const CPU_BASED_IO_BITMAPS : uint64_t = 1 << 25;
49+
pub const CPU_BASED_MTF : uint64_t = 1 << 27;
50+
pub const CPU_BASED_MSR_BITMAPS : uint64_t = 1 << 28;
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pub const CPU_BASED_MONITOR : uint64_t = 1 << 29;
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pub const CPU_BASED_PAUSE : uint64_t = 1 << 30;
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pub const CPU_BASED_SECONDARY_CTLS : uint64_t = 1 << 31;
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33-
pub const CPU_BASED2_VIRTUAL_APIC : uint64_t = 1 << 0;
34-
pub const CPU_BASED2_EPT : uint64_t = 1 << 1;
35-
pub const CPU_BASED2_DESC_TABLE : uint64_t = 1 << 2;
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pub const CPU_BASED2_RDTSCP : uint64_t = 1 << 3;
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pub const CPU_BASED2_X2APIC : uint64_t = 1 << 4;
38-
pub const CPU_BASED2_VPID : uint64_t = 1 << 5;
39-
pub const CPU_BASED2_WBINVD : uint64_t = 1 << 6;
40-
pub const CPU_BASED2_UNRESTRICTED : uint64_t = 1 << 7;
41-
pub const CPU_BASED2_APIC_REG_VIRT : uint64_t = 1 << 8;
42-
pub const CPU_BASED2_VIRT_INTR_DELIVERY : uint64_t = 1 << 9;
43-
pub const CPU_BASED2_PAUSE_LOOP : uint64_t = 1 << 10;
44-
pub const CPU_BASED2_RDRAND : uint64_t = 1 << 11;
45-
pub const CPU_BASED2_INVPCID : uint64_t = 1 << 12;
46-
pub const CPU_BASED2_VMFUNC : uint64_t = 1 << 13;
47-
pub const CPU_BASED2_VMCS_SHADOW : uint64_t = 1 << 14;
48-
pub const CPU_BASED2_RDSEED : uint64_t = 1 << 16;
49-
pub const CPU_BASED2_EPT_VE : uint64_t = 1 << 18;
50-
pub const CPU_BASED2_XSAVES_XRSTORS : uint64_t = 1 << 20;
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pub const CPU_BASED2_VIRTUAL_APIC : uint64_t = 1 << 0;
56+
pub const CPU_BASED2_EPT : uint64_t = 1 << 1;
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pub const CPU_BASED2_DESC_TABLE : uint64_t = 1 << 2;
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pub const CPU_BASED2_RDTSCP : uint64_t = 1 << 3;
59+
pub const CPU_BASED2_X2APIC : uint64_t = 1 << 4;
60+
pub const CPU_BASED2_VPID : uint64_t = 1 << 5;
61+
pub const CPU_BASED2_WBINVD : uint64_t = 1 << 6;
62+
pub const CPU_BASED2_UNRESTRICTED : uint64_t = 1 << 7;
63+
pub const CPU_BASED2_APIC_REG_VIRT : uint64_t = 1 << 8;
64+
pub const CPU_BASED2_VIRT_INTR_DELIVERY : uint64_t = 1 << 9;
65+
pub const CPU_BASED2_PAUSE_LOOP : uint64_t = 1 << 10;
66+
pub const CPU_BASED2_RDRAND : uint64_t = 1 << 11;
67+
pub const CPU_BASED2_INVPCID : uint64_t = 1 << 12;
68+
pub const CPU_BASED2_VMFUNC : uint64_t = 1 << 13;
69+
pub const CPU_BASED2_VMCS_SHADOW : uint64_t = 1 << 14;
70+
pub const CPU_BASED2_RDSEED : uint64_t = 1 << 16;
71+
pub const CPU_BASED2_EPT_VE : uint64_t = 1 << 18;
72+
pub const CPU_BASED2_XSAVES_XRSTORS : uint64_t = 1 << 20;
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52-
pub const VMX_EPT_VPID_SUPPORT_AD : uint64_t = 1 << 21;
53-
pub const VMX_EPT_VPID_SUPPORT_EXONLY : uint64_t = 1 << 0;
74+
pub const VMX_EPT_VPID_SUPPORT_AD : uint64_t = 1 << 21;
75+
pub const VMX_EPT_VPID_SUPPORT_EXONLY : uint64_t = 1 << 0;
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55-
pub const VMEXIT_SAVE_DBG_CONTROLS : uint64_t = 1 << 2;
56-
pub const VMEXIT_HOST_IA32E : uint64_t = 1 << 9;
57-
pub const VMEXIT_LOAD_IA32_PERF_GLOBAL_CTRL : uint64_t = 1 << 12;
58-
pub const VMEXIT_ACK_INTR : uint64_t = 1 << 15;
59-
pub const VMEXIT_SAVE_IA32_PAT : uint64_t = 1 << 18;
60-
pub const VMEXIT_LOAD_IA32_PAT : uint64_t = 1 << 19;
61-
pub const VMEXIT_SAVE_EFER : uint64_t = 1 << 20;
62-
pub const VMEXIT_LOAD_EFER : uint64_t = 1 << 21;
63-
pub const VMEXIT_SAVE_VMX_TIMER : uint64_t = 1 << 22;
77+
pub const VMEXIT_SAVE_DBG_CONTROLS : uint64_t = 1 << 2;
78+
pub const VMEXIT_HOST_IA32E : uint64_t = 1 << 9;
79+
pub const VMEXIT_LOAD_IA32_PERF_GLOBAL_CTRL : uint64_t = 1 << 12;
80+
pub const VMEXIT_ACK_INTR : uint64_t = 1 << 15;
81+
pub const VMEXIT_SAVE_IA32_PAT : uint64_t = 1 << 18;
82+
pub const VMEXIT_LOAD_IA32_PAT : uint64_t = 1 << 19;
83+
pub const VMEXIT_SAVE_EFER : uint64_t = 1 << 20;
84+
pub const VMEXIT_LOAD_EFER : uint64_t = 1 << 21;
85+
pub const VMEXIT_SAVE_VMX_TIMER : uint64_t = 1 << 22;
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65-
pub const VMENTRY_LOAD_DBG_CONTROLS : uint64_t = 1 << 2;
66-
pub const VMENTRY_GUEST_IA32E : uint64_t = 1 << 9;
67-
pub const VMENTRY_SMM : uint64_t = 1 << 10;
68-
pub const VMENTRY_DEACTIVATE_DUAL_MONITOR : uint64_t = 1 << 11;
69-
pub const VMENTRY_LOAD_IA32_PERF_GLOBAL_CTRL: uint64_t = 1 << 13;
70-
pub const VMENTRY_LOAD_IA32_PAT : uint64_t = 1 << 14;
71-
pub const VMENTRY_LOAD_EFER : uint64_t = 1 << 15;
87+
pub const VMENTRY_LOAD_DBG_CONTROLS : uint64_t = 1 << 2;
88+
pub const VMENTRY_GUEST_IA32E : uint64_t = 1 << 9;
89+
pub const VMENTRY_SMM : uint64_t = 1 << 10;
90+
pub const VMENTRY_DEACTIVATE_DUAL_MONITOR : uint64_t = 1 << 11;
91+
pub const VMENTRY_LOAD_IA32_PERF_GLOBAL_CTRL : uint64_t = 1 << 13;
92+
pub const VMENTRY_LOAD_IA32_PAT : uint64_t = 1 << 14;
93+
pub const VMENTRY_LOAD_EFER : uint64_t = 1 << 15;

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