From 1440187a760b1a57f11b872e03a8302b2e6cdbf5 Mon Sep 17 00:00:00 2001 From: Caleb Zulawski Date: Wed, 14 Dec 2022 00:28:35 -0500 Subject: [PATCH 1/3] Use element type in mask --- crates/core_simd/src/elements/const_ptr.rs | 2 +- crates/core_simd/src/elements/float.rs | 13 ++--- crates/core_simd/src/elements/int.rs | 6 +- crates/core_simd/src/elements/mut_ptr.rs | 2 +- crates/core_simd/src/eq.rs | 16 +++--- crates/core_simd/src/masks.rs | 66 +++++++++++----------- crates/core_simd/src/ord.rs | 16 +++--- crates/core_simd/src/select.rs | 15 ++--- crates/core_simd/src/vector.rs | 24 ++++---- 9 files changed, 78 insertions(+), 82 deletions(-) diff --git a/crates/core_simd/src/elements/const_ptr.rs b/crates/core_simd/src/elements/const_ptr.rs index 0ef9802b5e2..b6c2fc34119 100644 --- a/crates/core_simd/src/elements/const_ptr.rs +++ b/crates/core_simd/src/elements/const_ptr.rs @@ -79,7 +79,7 @@ where type Usize = Simd; type Isize = Simd; type MutPtr = Simd<*mut T, LANES>; - type Mask = Mask; + type Mask = Mask<*const T, LANES>; #[inline] fn is_null(self) -> Self::Mask { diff --git a/crates/core_simd/src/elements/float.rs b/crates/core_simd/src/elements/float.rs index d6022327055..0ee3fc8fff5 100644 --- a/crates/core_simd/src/elements/float.rs +++ b/crates/core_simd/src/elements/float.rs @@ -1,7 +1,6 @@ use super::sealed::Sealed; use crate::simd::{ - intrinsics, LaneCount, Mask, Simd, SimdElement, SimdPartialEq, SimdPartialOrd, - SupportedLaneCount, + intrinsics, LaneCount, Mask, Simd, SimdPartialEq, SimdPartialOrd, SupportedLaneCount, }; /// Operations on SIMD vectors of floats. @@ -191,7 +190,7 @@ pub trait SimdFloat: Copy + Sealed { } macro_rules! impl_trait { - { $($ty:ty { bits: $bits_ty:ty, mask: $mask_ty:ty }),* } => { + { $($ty:ty { bits: $bits_ty:ty }),* } => { $( impl Sealed for Simd<$ty, LANES> where @@ -203,7 +202,7 @@ macro_rules! impl_trait { where LaneCount: SupportedLaneCount, { - type Mask = Mask<<$mask_ty as SimdElement>::Mask, LANES>; + type Mask = Mask<$ty, LANES>; type Scalar = $ty; type Bits = Simd<$bits_ty, LANES>; @@ -251,7 +250,7 @@ macro_rules! impl_trait { #[inline] fn is_sign_negative(self) -> Self::Mask { let sign_bits = self.to_bits() & Simd::splat((!0 >> 1) + 1); - sign_bits.simd_gt(Simd::splat(0)) + sign_bits.simd_gt(Simd::splat(0)).cast() } #[inline] @@ -271,7 +270,7 @@ macro_rules! impl_trait { #[inline] fn is_subnormal(self) -> Self::Mask { - self.abs().simd_ne(Self::splat(0.0)) & (self.to_bits() & Self::splat(Self::Scalar::INFINITY).to_bits()).simd_eq(Simd::splat(0)) + self.abs().simd_ne(Self::splat(0.0)) & (self.to_bits() & Self::splat(Self::Scalar::INFINITY).to_bits()).simd_eq(Simd::splat(0)).cast() } #[inline] @@ -354,4 +353,4 @@ macro_rules! impl_trait { } } -impl_trait! { f32 { bits: u32, mask: i32 }, f64 { bits: u64, mask: i64 } } +impl_trait! { f32 { bits: u32 }, f64 { bits: u64 } } diff --git a/crates/core_simd/src/elements/int.rs b/crates/core_simd/src/elements/int.rs index 9b8c37ed466..a3f86639e21 100644 --- a/crates/core_simd/src/elements/int.rs +++ b/crates/core_simd/src/elements/int.rs @@ -1,7 +1,5 @@ use super::sealed::Sealed; -use crate::simd::{ - intrinsics, LaneCount, Mask, Simd, SimdElement, SimdPartialOrd, SupportedLaneCount, -}; +use crate::simd::{intrinsics, LaneCount, Mask, Simd, SimdPartialOrd, SupportedLaneCount}; /// Operations on SIMD vectors of signed integers. pub trait SimdInt: Copy + Sealed { @@ -196,7 +194,7 @@ macro_rules! impl_trait { where LaneCount: SupportedLaneCount, { - type Mask = Mask<<$ty as SimdElement>::Mask, LANES>; + type Mask = Mask<$ty, LANES>; type Scalar = $ty; #[inline] diff --git a/crates/core_simd/src/elements/mut_ptr.rs b/crates/core_simd/src/elements/mut_ptr.rs index d87986b4a09..cc2c0e7a578 100644 --- a/crates/core_simd/src/elements/mut_ptr.rs +++ b/crates/core_simd/src/elements/mut_ptr.rs @@ -74,7 +74,7 @@ where type Usize = Simd; type Isize = Simd; type ConstPtr = Simd<*const T, LANES>; - type Mask = Mask; + type Mask = Mask<*mut T, LANES>; #[inline] fn is_null(self) -> Self::Mask { diff --git a/crates/core_simd/src/eq.rs b/crates/core_simd/src/eq.rs index 80763c07272..47e1d6a7c3e 100644 --- a/crates/core_simd/src/eq.rs +++ b/crates/core_simd/src/eq.rs @@ -1,5 +1,5 @@ use crate::simd::{ - intrinsics, LaneCount, Mask, Simd, SimdConstPtr, SimdElement, SimdMutPtr, SupportedLaneCount, + intrinsics, LaneCount, Mask, Simd, SimdConstPtr, SimdMutPtr, SupportedLaneCount, }; /// Parallel `PartialEq`. @@ -23,7 +23,7 @@ macro_rules! impl_number { where LaneCount: SupportedLaneCount, { - type Mask = Mask<<$number as SimdElement>::Mask, LANES>; + type Mask = Mask<$number, LANES>; #[inline] fn simd_eq(self, other: Self) -> Self::Mask { @@ -78,16 +78,16 @@ impl SimdPartialEq for Simd<*const T, LANES> where LaneCount: SupportedLaneCount, { - type Mask = Mask; + type Mask = Mask<*const T, LANES>; #[inline] fn simd_eq(self, other: Self) -> Self::Mask { - self.addr().simd_eq(other.addr()) + self.addr().simd_eq(other.addr()).cast() } #[inline] fn simd_ne(self, other: Self) -> Self::Mask { - self.addr().simd_ne(other.addr()) + self.addr().simd_ne(other.addr()).cast() } } @@ -95,15 +95,15 @@ impl SimdPartialEq for Simd<*mut T, LANES> where LaneCount: SupportedLaneCount, { - type Mask = Mask; + type Mask = Mask<*mut T, LANES>; #[inline] fn simd_eq(self, other: Self) -> Self::Mask { - self.addr().simd_eq(other.addr()) + self.addr().simd_eq(other.addr()).cast() } #[inline] fn simd_ne(self, other: Self) -> Self::Mask { - self.addr().simd_ne(other.addr()) + self.addr().simd_ne(other.addr()).cast() } } diff --git a/crates/core_simd/src/masks.rs b/crates/core_simd/src/masks.rs index e58df80fca8..acf6941beaf 100644 --- a/crates/core_simd/src/masks.rs +++ b/crates/core_simd/src/masks.rs @@ -89,21 +89,21 @@ impl_element! { isize } /// and/or Rust versions, and code should not assume that it is equivalent to /// `[T; LANES]`. #[repr(transparent)] -pub struct Mask(mask_impl::Mask) +pub struct Mask(mask_impl::Mask) where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount; impl Copy for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { } impl Clone for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -114,7 +114,7 @@ where impl Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { /// Construct a mask by setting all lanes to the given value. @@ -167,7 +167,7 @@ where /// All lanes must be either 0 or -1. #[inline] #[must_use = "method returns a new mask and does not mutate the original value"] - pub unsafe fn from_int_unchecked(value: Simd) -> Self { + pub unsafe fn from_int_unchecked(value: Simd) -> Self { // Safety: the caller must confirm this invariant unsafe { Self(mask_impl::Mask::from_int_unchecked(value)) } } @@ -179,8 +179,8 @@ where /// Panics if any lane is not 0 or -1. #[inline] #[must_use = "method returns a new mask and does not mutate the original value"] - pub fn from_int(value: Simd) -> Self { - assert!(T::valid(value), "all values must be either 0 or -1",); + pub fn from_int(value: Simd) -> Self { + assert!(T::Mask::valid(value), "all values must be either 0 or -1",); // Safety: the validity has been checked unsafe { Self::from_int_unchecked(value) } } @@ -189,14 +189,14 @@ where /// represents `true`. #[inline] #[must_use = "method returns a new vector and does not mutate the original value"] - pub fn to_int(self) -> Simd { + pub fn to_int(self) -> Simd { self.0.to_int() } /// Converts the mask to a mask of any other lane size. #[inline] #[must_use = "method returns a new mask and does not mutate the original value"] - pub fn cast(self) -> Mask { + pub fn cast(self) -> Mask { Mask(self.0.convert()) } @@ -266,7 +266,7 @@ where // vector/array conversion impl From<[bool; LANES]> for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -277,7 +277,7 @@ where impl From> for [bool; LANES] where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -288,7 +288,7 @@ where impl Default for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -300,7 +300,8 @@ where impl PartialEq for Mask where - T: MaskElement + PartialEq, + T: SimdElement, + T::Mask: PartialEq, LaneCount: SupportedLaneCount, { #[inline] @@ -312,7 +313,8 @@ where impl PartialOrd for Mask where - T: MaskElement + PartialOrd, + T: SimdElement, + T::Mask: PartialOrd, LaneCount: SupportedLaneCount, { #[inline] @@ -324,7 +326,7 @@ where impl fmt::Debug for Mask where - T: MaskElement + fmt::Debug, + T: SimdElement + fmt::Debug, LaneCount: SupportedLaneCount, { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { @@ -336,7 +338,7 @@ where impl core::ops::BitAnd for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Self; @@ -349,7 +351,7 @@ where impl core::ops::BitAnd for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Self; @@ -362,7 +364,7 @@ where impl core::ops::BitAnd> for bool where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Mask; @@ -375,7 +377,7 @@ where impl core::ops::BitOr for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Self; @@ -388,7 +390,7 @@ where impl core::ops::BitOr for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Self; @@ -401,7 +403,7 @@ where impl core::ops::BitOr> for bool where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Mask; @@ -414,7 +416,7 @@ where impl core::ops::BitXor for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Self; @@ -427,7 +429,7 @@ where impl core::ops::BitXor for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Self; @@ -440,7 +442,7 @@ where impl core::ops::BitXor> for bool where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Mask; @@ -453,7 +455,7 @@ where impl core::ops::Not for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Mask; @@ -466,7 +468,7 @@ where impl core::ops::BitAndAssign for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -477,7 +479,7 @@ where impl core::ops::BitAndAssign for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -488,7 +490,7 @@ where impl core::ops::BitOrAssign for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -499,7 +501,7 @@ where impl core::ops::BitOrAssign for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -510,7 +512,7 @@ where impl core::ops::BitXorAssign for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -521,7 +523,7 @@ where impl core::ops::BitXorAssign for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] diff --git a/crates/core_simd/src/ord.rs b/crates/core_simd/src/ord.rs index 1ae9cd061fb..8a0e3f7f731 100644 --- a/crates/core_simd/src/ord.rs +++ b/crates/core_simd/src/ord.rs @@ -220,22 +220,22 @@ where { #[inline] fn simd_lt(self, other: Self) -> Self::Mask { - self.addr().simd_lt(other.addr()) + self.addr().simd_lt(other.addr()).cast() } #[inline] fn simd_le(self, other: Self) -> Self::Mask { - self.addr().simd_le(other.addr()) + self.addr().simd_le(other.addr()).cast() } #[inline] fn simd_gt(self, other: Self) -> Self::Mask { - self.addr().simd_gt(other.addr()) + self.addr().simd_gt(other.addr()).cast() } #[inline] fn simd_ge(self, other: Self) -> Self::Mask { - self.addr().simd_ge(other.addr()) + self.addr().simd_ge(other.addr()).cast() } } @@ -269,22 +269,22 @@ where { #[inline] fn simd_lt(self, other: Self) -> Self::Mask { - self.addr().simd_lt(other.addr()) + self.addr().simd_lt(other.addr()).cast() } #[inline] fn simd_le(self, other: Self) -> Self::Mask { - self.addr().simd_le(other.addr()) + self.addr().simd_le(other.addr()).cast() } #[inline] fn simd_gt(self, other: Self) -> Self::Mask { - self.addr().simd_gt(other.addr()) + self.addr().simd_gt(other.addr()).cast() } #[inline] fn simd_ge(self, other: Self) -> Self::Mask { - self.addr().simd_ge(other.addr()) + self.addr().simd_ge(other.addr()).cast() } } diff --git a/crates/core_simd/src/select.rs b/crates/core_simd/src/select.rs index 065c5987d3f..0216292dbb5 100644 --- a/crates/core_simd/src/select.rs +++ b/crates/core_simd/src/select.rs @@ -1,9 +1,9 @@ use crate::simd::intrinsics; -use crate::simd::{LaneCount, Mask, MaskElement, Simd, SimdElement, SupportedLaneCount}; +use crate::simd::{LaneCount, Mask, Simd, SimdElement, SupportedLaneCount}; impl Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { /// Choose lanes from two vectors. @@ -23,14 +23,11 @@ where /// ``` #[inline] #[must_use = "method returns a new vector and does not mutate the original inputs"] - pub fn select( + pub fn select( self, - true_values: Simd, - false_values: Simd, - ) -> Simd - where - U: SimdElement, - { + true_values: Simd, + false_values: Simd, + ) -> Simd { // Safety: The mask has been cast to a vector of integers, // and the operands to select between are vectors of the same type and length. unsafe { intrinsics::simd_select(self.to_int(), true_values, false_values) } diff --git a/crates/core_simd/src/vector.rs b/crates/core_simd/src/vector.rs index 51b0d999a81..5dea88c2f2d 100644 --- a/crates/core_simd/src/vector.rs +++ b/crates/core_simd/src/vector.rs @@ -313,11 +313,11 @@ where #[inline] pub fn gather_select( slice: &[T], - enable: Mask, + enable: Mask, idxs: Simd, or: Self, ) -> Self { - let enable: Mask = enable & idxs.simd_lt(Simd::splat(slice.len())); + let enable: Mask = enable & idxs.simd_lt(Simd::splat(slice.len())); // Safety: We have masked-off out-of-bounds lanes. unsafe { Self::gather_select_unchecked(slice, enable, idxs, or) } } @@ -354,7 +354,7 @@ where #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces pub unsafe fn gather_select_unchecked( slice: &[T], - enable: Mask, + enable: Mask, idxs: Simd, or: Self, ) -> Self { @@ -362,7 +362,7 @@ where // Ferris forgive me, I have done pointer arithmetic here. let ptrs = base_ptr.wrapping_add(idxs); // Safety: The caller is responsible for determining the indices are okay to read - unsafe { Self::gather_select_ptr(ptrs, enable, or) } + unsafe { Self::gather_select_ptr(ptrs, enable.cast(), or) } } /// Read pointers elementwise into a SIMD vector. @@ -421,7 +421,7 @@ where #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces pub unsafe fn gather_select_ptr( source: Simd<*const T, LANES>, - enable: Mask, + enable: Mask<*const T, LANES>, or: Self, ) -> Self { // Safety: The caller is responsible for upholding all invariants @@ -472,10 +472,10 @@ where pub fn scatter_select( self, slice: &mut [T], - enable: Mask, + enable: Mask, idxs: Simd, ) { - let enable: Mask = enable & idxs.simd_lt(Simd::splat(slice.len())); + let enable: Mask = enable & idxs.simd_lt(Simd::splat(slice.len())); // Safety: We have masked-off out-of-bounds lanes. unsafe { self.scatter_select_unchecked(slice, enable, idxs) } } @@ -514,7 +514,7 @@ where pub unsafe fn scatter_select_unchecked( self, slice: &mut [T], - enable: Mask, + enable: Mask, idxs: Simd, ) { // Safety: This block works with *mut T derived from &mut 'a [T], @@ -533,7 +533,7 @@ where // Ferris forgive me, I have done pointer arithmetic here. let ptrs = base_ptr.wrapping_add(idxs); // The ptrs have been bounds-masked to prevent memory-unsafe writes insha'allah - self.scatter_select_ptr(ptrs, enable); + self.scatter_select_ptr(ptrs, enable.cast()); // Cleared ☢️ *mut T Zone } } @@ -586,7 +586,7 @@ where /// ``` #[inline] #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces - pub unsafe fn scatter_select_ptr(self, dest: Simd<*mut T, LANES>, enable: Mask) { + pub unsafe fn scatter_select_ptr(self, dest: Simd<*mut T, LANES>, enable: Mask<*mut T, LANES>) { // Safety: The caller is responsible for upholding all invariants unsafe { intrinsics::simd_scatter(self, dest, enable.to_int()) } } @@ -630,7 +630,7 @@ where // Safety: All SIMD vectors are SimdPartialEq, and the comparison produces a valid mask. let mask = unsafe { let tfvec: Simd<::Mask, LANES> = intrinsics::simd_eq(*self, *other); - Mask::from_int_unchecked(tfvec) + Mask::::from_int_unchecked(tfvec) }; // Two vectors are equal if all lanes tested true for vertical equality. @@ -643,7 +643,7 @@ where // Safety: All SIMD vectors are SimdPartialEq, and the comparison produces a valid mask. let mask = unsafe { let tfvec: Simd<::Mask, LANES> = intrinsics::simd_ne(*self, *other); - Mask::from_int_unchecked(tfvec) + Mask::::from_int_unchecked(tfvec) }; // Two vectors are non-equal if any lane tested true for vertical non-equality. From 70ba34a2620218e0c2cd8a8a57473521b370fc84 Mon Sep 17 00:00:00 2001 From: Caleb Zulawski Date: Wed, 14 Dec 2022 00:33:36 -0500 Subject: [PATCH 2/3] Remove From implementation --- crates/core_simd/src/masks.rs | 21 --------------------- crates/core_simd/tests/masks.rs | 26 ++++++++++---------------- 2 files changed, 10 insertions(+), 37 deletions(-) diff --git a/crates/core_simd/src/masks.rs b/crates/core_simd/src/masks.rs index acf6941beaf..cfb6c305128 100644 --- a/crates/core_simd/src/masks.rs +++ b/crates/core_simd/src/masks.rs @@ -531,24 +531,3 @@ where *self ^= Self::splat(rhs); } } - -macro_rules! impl_from { - { $from:ty => $($to:ty),* } => { - $( - impl From> for Mask<$to, LANES> - where - LaneCount: SupportedLaneCount, - { - #[inline] - fn from(value: Mask<$from, LANES>) -> Self { - value.cast() - } - } - )* - } -} -impl_from! { i8 => i16, i32, i64, isize } -impl_from! { i16 => i32, i64, isize, i8 } -impl_from! { i32 => i64, isize, i8, i16 } -impl_from! { i64 => isize, i8, i16, i32 } -impl_from! { isize => i8, i16, i32, i64 } diff --git a/crates/core_simd/tests/masks.rs b/crates/core_simd/tests/masks.rs index 9f8bad1c36c..dac0fbccea0 100644 --- a/crates/core_simd/tests/masks.rs +++ b/crates/core_simd/tests/masks.rs @@ -104,18 +104,13 @@ macro_rules! test_mask_api { #[test] fn cast() { - fn cast_impl() - where - Mask<$type, 8>: Into>, + fn cast_impl() { let values = [true, false, false, true, false, false, true, false]; let mask = Mask::<$type, 8>::from_array(values); let cast_mask = mask.cast::(); assert_eq!(values, cast_mask.to_array()); - - let into_mask: Mask = mask.into(); - assert_eq!(values, into_mask.to_array()); } cast_impl::(); @@ -123,6 +118,15 @@ macro_rules! test_mask_api { cast_impl::(); cast_impl::(); cast_impl::(); + cast_impl::(); + cast_impl::(); + cast_impl::(); + cast_impl::(); + cast_impl::(); + cast_impl::(); + cast_impl::(); + cast_impl::<*mut u8>(); + cast_impl::<*const u8>(); } #[cfg(feature = "generic_const_exprs")] @@ -149,13 +153,3 @@ mod mask_api { test_mask_api! { i64 } test_mask_api! { isize } } - -#[test] -fn convert() { - use core_simd::simd::Mask; - let values = [true, false, false, true, false, false, true, false]; - assert_eq!( - Mask::::from_array(values), - Mask::::from_array(values).into() - ); -} From 7855cf96524faa967edd7ab9be85ae7afdf74d8d Mon Sep 17 00:00:00 2001 From: Caleb Zulawski Date: Thu, 15 Dec 2022 20:09:13 -0500 Subject: [PATCH 3/3] Fix bitmask feature --- crates/core_simd/src/masks.rs | 4 +- crates/core_simd/src/masks/bitmask.rs | 40 ++++++++++-------- crates/core_simd/src/masks/full_masks.rs | 54 ++++++++++++++---------- 3 files changed, 55 insertions(+), 43 deletions(-) diff --git a/crates/core_simd/src/masks.rs b/crates/core_simd/src/masks.rs index cfb6c305128..2cb0d132a05 100644 --- a/crates/core_simd/src/masks.rs +++ b/crates/core_simd/src/masks.rs @@ -89,7 +89,7 @@ impl_element! { isize } /// and/or Rust versions, and code should not assume that it is equivalent to /// `[T; LANES]`. #[repr(transparent)] -pub struct Mask(mask_impl::Mask) +pub struct Mask(mask_impl::Mask) where T: SimdElement, LaneCount: SupportedLaneCount; @@ -197,7 +197,7 @@ where #[inline] #[must_use = "method returns a new mask and does not mutate the original value"] pub fn cast(self) -> Mask { - Mask(self.0.convert()) + Mask(self.0.cast()) } /// Tests the value of the specified lane. diff --git a/crates/core_simd/src/masks/bitmask.rs b/crates/core_simd/src/masks/bitmask.rs index 20465ba9b07..dac691e48cb 100644 --- a/crates/core_simd/src/masks/bitmask.rs +++ b/crates/core_simd/src/masks/bitmask.rs @@ -1,5 +1,5 @@ #![allow(unused_imports)] -use super::MaskElement; +use super::{Sealed as _, SimdElement}; use crate::simd::intrinsics; use crate::simd::{LaneCount, Simd, SupportedLaneCount, ToBitMask}; use core::marker::PhantomData; @@ -11,19 +11,19 @@ pub struct Mask( PhantomData, ) where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount; impl Copy for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { } impl Clone for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -34,7 +34,7 @@ where impl PartialEq for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -45,7 +45,7 @@ where impl PartialOrd for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -56,14 +56,14 @@ where impl Eq for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { } impl Ord for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -74,7 +74,7 @@ where impl Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -107,15 +107,19 @@ where #[inline] #[must_use = "method returns a new vector and does not mutate the original value"] - pub fn to_int(self) -> Simd { + pub fn to_int(self) -> Simd { unsafe { - intrinsics::simd_select_bitmask(self.0, Simd::splat(T::TRUE), Simd::splat(T::FALSE)) + intrinsics::simd_select_bitmask( + self.0, + Simd::splat(T::Mask::TRUE), + Simd::splat(T::Mask::FALSE), + ) } } #[inline] #[must_use = "method returns a new mask and does not mutate the original value"] - pub unsafe fn from_int_unchecked(value: Simd) -> Self { + pub unsafe fn from_int_unchecked(value: Simd) -> Self { unsafe { Self(intrinsics::simd_bitmask(value), PhantomData) } } @@ -159,9 +163,9 @@ where #[inline] #[must_use = "method returns a new mask and does not mutate the original value"] - pub fn convert(self) -> Mask + pub fn cast(self) -> Mask where - U: MaskElement, + U: SimdElement, { // Safety: bitmask layout does not depend on the element width unsafe { core::mem::transmute_copy(&self) } @@ -182,7 +186,7 @@ where impl core::ops::BitAnd for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, as SupportedLaneCount>::BitMask: AsRef<[u8]> + AsMut<[u8]>, { @@ -199,7 +203,7 @@ where impl core::ops::BitOr for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, as SupportedLaneCount>::BitMask: AsRef<[u8]> + AsMut<[u8]>, { @@ -216,7 +220,7 @@ where impl core::ops::BitXor for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Self; @@ -232,7 +236,7 @@ where impl core::ops::Not for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Self; diff --git a/crates/core_simd/src/masks/full_masks.rs b/crates/core_simd/src/masks/full_masks.rs index bcedd2df225..2017d7ad6ff 100644 --- a/crates/core_simd/src/masks/full_masks.rs +++ b/crates/core_simd/src/masks/full_masks.rs @@ -1,6 +1,6 @@ //! Masks that take up full SIMD vector registers. -use super::MaskElement; +use super::{Sealed as _, SimdElement}; use crate::simd::intrinsics; use crate::simd::{LaneCount, Simd, SupportedLaneCount, ToBitMask}; @@ -8,21 +8,21 @@ use crate::simd::{LaneCount, Simd, SupportedLaneCount, ToBitMask}; use crate::simd::ToBitMaskArray; #[repr(transparent)] -pub struct Mask(Simd) +pub struct Mask(Simd) where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount; impl Copy for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { } impl Clone for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -34,7 +34,8 @@ where impl PartialEq for Mask where - T: MaskElement + PartialEq, + T: SimdElement, + T::Mask: PartialEq, LaneCount: SupportedLaneCount, { #[inline] @@ -45,7 +46,8 @@ where impl PartialOrd for Mask where - T: MaskElement + PartialOrd, + T: SimdElement, + T::Mask: PartialOrd, LaneCount: SupportedLaneCount, { #[inline] @@ -56,14 +58,16 @@ where impl Eq for Mask where - T: MaskElement + Eq, + T: SimdElement, + T::Mask: Eq, LaneCount: SupportedLaneCount, { } impl Ord for Mask where - T: MaskElement + Ord, + T: SimdElement, + T::Mask: Ord, LaneCount: SupportedLaneCount, { #[inline] @@ -103,43 +107,47 @@ impl_reverse_bits! { u8, u16, u32, u64 } impl Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] #[must_use = "method returns a new mask and does not mutate the original value"] pub fn splat(value: bool) -> Self { - Self(Simd::splat(if value { T::TRUE } else { T::FALSE })) + Self(Simd::splat(if value { + T::Mask::TRUE + } else { + T::Mask::FALSE + })) } #[inline] #[must_use = "method returns a new bool and does not mutate the original value"] pub unsafe fn test_unchecked(&self, lane: usize) -> bool { - T::eq(self.0[lane], T::TRUE) + T::Mask::eq(self.0[lane], T::Mask::TRUE) } #[inline] pub unsafe fn set_unchecked(&mut self, lane: usize, value: bool) { - self.0[lane] = if value { T::TRUE } else { T::FALSE } + self.0[lane] = if value { T::Mask::TRUE } else { T::Mask::FALSE } } #[inline] #[must_use = "method returns a new vector and does not mutate the original value"] - pub fn to_int(self) -> Simd { + pub fn to_int(self) -> Simd { self.0 } #[inline] #[must_use = "method returns a new mask and does not mutate the original value"] - pub unsafe fn from_int_unchecked(value: Simd) -> Self { + pub unsafe fn from_int_unchecked(value: Simd) -> Self { Self(value) } #[inline] #[must_use = "method returns a new mask and does not mutate the original value"] - pub fn convert(self) -> Mask + pub fn cast(self) -> Mask where - U: MaskElement, + U: SimdElement, { // Safety: masks are simply integer vectors of 0 and -1, and we can cast the element type. unsafe { Mask(intrinsics::simd_cast(self.0)) } @@ -260,9 +268,9 @@ where } } -impl core::convert::From> for Simd +impl core::convert::From> for Simd where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { #[inline] @@ -273,7 +281,7 @@ where impl core::ops::BitAnd for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Self; @@ -287,7 +295,7 @@ where impl core::ops::BitOr for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Self; @@ -301,7 +309,7 @@ where impl core::ops::BitXor for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Self; @@ -315,7 +323,7 @@ where impl core::ops::Not for Mask where - T: MaskElement, + T: SimdElement, LaneCount: SupportedLaneCount, { type Output = Self;