inline

burrbull · burrbull · commit af6722167307 · 2025-03-13T09:09:00.000+03:00
diff --git a/src/generate/generic.rs b/src/generate/generic.rs
@@ -177,6 +177,7 @@ pub mod raw {
     }
 
     impl<REG: RegisterSpec> FromBits<REG::Ux> for R<REG> {
+        #[inline(always)]
         unsafe fn from_bits(bits: REG::Ux) -> Self {
             Self {
                 bits,
@@ -192,6 +193,7 @@ pub mod raw {
     }
 
     impl<REG: RegisterSpec> FromBits<REG::Ux> for W<REG> {
+        #[inline(always)]
         unsafe fn from_bits(bits: REG::Ux) -> Self {
             Self {
                 bits,
@@ -201,6 +203,7 @@ pub mod raw {
     }
 
     impl<REG: RegisterSpec> ToBits<REG::Ux> for W<REG> {
+        #[inline(always)]
         fn to_bits(&self) -> REG::Ux {
             self.bits
         }

Original file line number	Diff line number	Diff line change
`@@ -177,6 +177,7 @@ pub mod raw {`
`177`	`177`	`}`
`178`	`178`
`179`	`179`	`impl<REG: RegisterSpec> FromBits<REG::Ux> for R<REG> {`
	`180`	`+ #[inline(always)]`
`180`	`181`	`unsafe fn from_bits(bits: REG::Ux) -> Self {`
`181`	`182`	`Self {`
`182`	`183`	`bits,`
`@@ -192,6 +193,7 @@ pub mod raw {`
`192`	`193`	`}`
`193`	`194`
`194`	`195`	`impl<REG: RegisterSpec> FromBits<REG::Ux> for W<REG> {`
	`196`	`+ #[inline(always)]`
`195`	`197`	`unsafe fn from_bits(bits: REG::Ux) -> Self {`
`196`	`198`	`Self {`
`197`	`199`	`bits,`
`@@ -201,6 +203,7 @@ pub mod raw {`
`201`	`203`	`}`
`202`	`204`
`203`	`205`	`impl<REG: RegisterSpec> ToBits<REG::Ux> for W<REG> {`
	`206`	`+ #[inline(always)]`
`204`	`207`	`fn to_bits(&self) -> REG::Ux {`
`205`	`208`	`self.bits`
`206`	`209`	`}`