Skip to content

Commit 3053b39

Browse files
sakumisusakumisu
committed
feat(cherryusb): add cherryusb device & host demo
1 parent b6ac07f commit 3053b39

File tree

12 files changed

+953
-0
lines changed

12 files changed

+953
-0
lines changed

‎usb/CMakeLists.txt‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,3 +13,15 @@ if (TARGET tinyusb_pico_pio_usb)
1313
else ()
1414
message("Skipping TinyUSB dual examples, as TinyUSB hw/mcu/raspberry_pi/Pico-PIO-USB submodule unavailable")
1515
endif ()
16+
17+
if (TARGET cherryusb_device)
18+
add_subdirectory(cherryusb/device)
19+
else()
20+
message("Skipping CherryUSB device examples as CherryUSB is unavailable")
21+
endif()
22+
23+
if (TARGET cherryusb_host)
24+
add_subdirectory(cherryusb/host)
25+
else()
26+
message("Skipping CherryUSB host examples as CherryUSB is unavailable")
27+
endif()

‎usb/cherryusb/device/CMakeLists.txt‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1 @@
1+
add_subdirectory(dev_cdc_msc_hid)

‎usb/cherryusb/device/dev_cdc_msc_hid/CMakeLists.txt‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,16 @@
1+
get_filename_component(project_name ${CMAKE_CURRENT_LIST_DIR} NAME)
2+
3+
add_executable(${project_name}
4+
main.c
5+
)
6+
7+
target_include_directories(${project_name} PUBLIC
8+
${CMAKE_CURRENT_LIST_DIR})
9+
10+
# pull in common dependencies
11+
target_link_libraries(${project_name} PRIVATE pico_stdlib hardware_resets hardware_irq cherryusb_device)
12+
# create map/bin/hex file etc.
13+
pico_add_extra_outputs(${project_name})
14+
15+
# add url via pico_set_program_url
16+
example_auto_set_url(${project_name})

‎usb/cherryusb/device/dev_cdc_msc_hid/main.c‎

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
#include "pico/stdlib.h"
2+
#include "pico/time.h"
3+
#include "usbd_core.h"
4+
#include <stdio.h>
5+
#include <string.h>
6+
7+
#include "cdc_acm_hid_msc_template.c"
8+
9+
int main(void)
10+
{
11+
stdio_init_all();
12+
printf("CherryUSB device cdc msc example\n");
13+
14+
extern void cdc_acm_hid_msc_descriptor_init(uint8_t busid, uintptr_t reg_base);
15+
cdc_acm_hid_msc_descriptor_init(0, 0); // regbase is not used
16+
17+
// Everything is interrupt driven so just loop here
18+
while (1) {
19+
extern void cdc_acm_data_send_with_dtr_test(uint8_t busid);
20+
cdc_acm_data_send_with_dtr_test(0);
21+
extern void hid_mouse_test(uint8_t busid);
22+
hid_mouse_test(0);
23+
}
24+
return 0;
25+
}

‎usb/cherryusb/device/dev_cdc_msc_hid/usb_config.h‎

Lines changed: 295 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,295 @@
1+
/*
2+
* Copyright (c) 2022, sakumisu
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
#ifndef CHERRYUSB_CONFIG_H
7+
#define CHERRYUSB_CONFIG_H
8+
9+
/* ================ USB common Configuration ================ */
10+
11+
#define CONFIG_USB_PRINTF(...) printf(__VA_ARGS__)
12+
13+
#ifndef CONFIG_USB_DBG_LEVEL
14+
#define CONFIG_USB_DBG_LEVEL USB_DBG_INFO
15+
#endif
16+
17+
/* Enable print with color */
18+
#define CONFIG_USB_PRINTF_COLOR_ENABLE
19+
20+
/* data align size when use dma or use dcache */
21+
#ifndef CONFIG_USB_ALIGN_SIZE
22+
#define CONFIG_USB_ALIGN_SIZE 4
23+
#endif
24+
25+
//#define CONFIG_USB_DCACHE_ENABLE
26+
27+
/* attribute data into no cache ram */
28+
#define USB_NOCACHE_RAM_SECTION
29+
30+
/* ================= USB Device Stack Configuration ================ */
31+
32+
/* Ep0 in and out transfer buffer */
33+
#ifndef CONFIG_USBDEV_REQUEST_BUFFER_LEN
34+
#define CONFIG_USBDEV_REQUEST_BUFFER_LEN 512
35+
#endif
36+
37+
/* Setup packet log for debug */
38+
// #define CONFIG_USBDEV_SETUP_LOG_PRINT
39+
40+
/* Send ep0 in data from user buffer instead of copying into ep0 reqdata
41+
* Please note that user buffer must be aligned with CONFIG_USB_ALIGN_SIZE
42+
*/
43+
// #define CONFIG_USBDEV_EP0_INDATA_NO_COPY
44+
45+
/* Check if the input descriptor is correct */
46+
// #define CONFIG_USBDEV_DESC_CHECK
47+
48+
/* Enable test mode */
49+
// #define CONFIG_USBDEV_TEST_MODE
50+
51+
#ifndef CONFIG_USBDEV_MSC_MAX_LUN
52+
#define CONFIG_USBDEV_MSC_MAX_LUN 1
53+
#endif
54+
55+
#ifndef CONFIG_USBDEV_MSC_MAX_BUFSIZE
56+
#define CONFIG_USBDEV_MSC_MAX_BUFSIZE 512
57+
#endif
58+
59+
#ifndef CONFIG_USBDEV_MSC_MANUFACTURER_STRING
60+
#define CONFIG_USBDEV_MSC_MANUFACTURER_STRING ""
61+
#endif
62+
63+
#ifndef CONFIG_USBDEV_MSC_PRODUCT_STRING
64+
#define CONFIG_USBDEV_MSC_PRODUCT_STRING ""
65+
#endif
66+
67+
#ifndef CONFIG_USBDEV_MSC_VERSION_STRING
68+
#define CONFIG_USBDEV_MSC_VERSION_STRING "0.01"
69+
#endif
70+
71+
/* move msc read & write from isr to while(1), you should call usbd_msc_polling in while(1) */
72+
// #define CONFIG_USBDEV_MSC_POLLING
73+
74+
/* move msc read & write from isr to thread */
75+
// #define CONFIG_USBDEV_MSC_THREAD
76+
77+
#ifndef CONFIG_USBDEV_MSC_PRIO
78+
#define CONFIG_USBDEV_MSC_PRIO 4
79+
#endif
80+
81+
#ifndef CONFIG_USBDEV_MSC_STACKSIZE
82+
#define CONFIG_USBDEV_MSC_STACKSIZE 2048
83+
#endif
84+
85+
#ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE
86+
#define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 156
87+
#endif
88+
89+
/* rndis transfer buffer size, must be a multiple of (1536 + 44)*/
90+
#ifndef CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE
91+
#define CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE 1580
92+
#endif
93+
94+
#ifndef CONFIG_USBDEV_RNDIS_VENDOR_ID
95+
#define CONFIG_USBDEV_RNDIS_VENDOR_ID 0x0000ffff
96+
#endif
97+
98+
#ifndef CONFIG_USBDEV_RNDIS_VENDOR_DESC
99+
#define CONFIG_USBDEV_RNDIS_VENDOR_DESC "CherryUSB"
100+
#endif
101+
102+
#define CONFIG_USBDEV_RNDIS_USING_LWIP
103+
104+
/* ================ USB HOST Stack Configuration ================== */
105+
106+
#define CONFIG_USBHOST_MAX_RHPORTS 1
107+
#define CONFIG_USBHOST_MAX_EXTHUBS 1
108+
#define CONFIG_USBHOST_MAX_EHPORTS 4
109+
#define CONFIG_USBHOST_MAX_INTERFACES 8
110+
#define CONFIG_USBHOST_MAX_INTF_ALTSETTINGS 8
111+
#define CONFIG_USBHOST_MAX_ENDPOINTS 4
112+
113+
#define CONFIG_USBHOST_MAX_CDC_ACM_CLASS 4
114+
#define CONFIG_USBHOST_MAX_HID_CLASS 4
115+
#define CONFIG_USBHOST_MAX_MSC_CLASS 2
116+
#define CONFIG_USBHOST_MAX_AUDIO_CLASS 1
117+
#define CONFIG_USBHOST_MAX_VIDEO_CLASS 1
118+
119+
#define CONFIG_USBHOST_DEV_NAMELEN 16
120+
121+
#ifndef CONFIG_USBHOST_PSC_PRIO
122+
#define CONFIG_USBHOST_PSC_PRIO 0
123+
#endif
124+
#ifndef CONFIG_USBHOST_PSC_STACKSIZE
125+
#define CONFIG_USBHOST_PSC_STACKSIZE 2048
126+
#endif
127+
128+
//#define CONFIG_USBHOST_GET_STRING_DESC
129+
130+
// #define CONFIG_USBHOST_MSOS_ENABLE
131+
#ifndef CONFIG_USBHOST_MSOS_VENDOR_CODE
132+
#define CONFIG_USBHOST_MSOS_VENDOR_CODE 0x00
133+
#endif
134+
135+
/* Ep0 max transfer buffer */
136+
#ifndef CONFIG_USBHOST_REQUEST_BUFFER_LEN
137+
#define CONFIG_USBHOST_REQUEST_BUFFER_LEN 512
138+
#endif
139+
140+
#ifndef CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT
141+
#define CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT 500
142+
#endif
143+
144+
#ifndef CONFIG_USBHOST_MSC_TIMEOUT
145+
#define CONFIG_USBHOST_MSC_TIMEOUT 5000
146+
#endif
147+
148+
/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
149+
* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
150+
*/
151+
#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE
152+
#define CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE (2048)
153+
#endif
154+
155+
/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
156+
#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE
157+
#define CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE (2048)
158+
#endif
159+
160+
/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
161+
* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
162+
*/
163+
#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE
164+
#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE (2048)
165+
#endif
166+
/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
167+
#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE
168+
#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE (2048)
169+
#endif
170+
171+
/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
172+
* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
173+
*/
174+
#ifndef CONFIG_USBHOST_ASIX_ETH_MAX_RX_SIZE
175+
#define CONFIG_USBHOST_ASIX_ETH_MAX_RX_SIZE (2048)
176+
#endif
177+
/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
178+
#ifndef CONFIG_USBHOST_ASIX_ETH_MAX_TX_SIZE
179+
#define CONFIG_USBHOST_ASIX_ETH_MAX_TX_SIZE (2048)
180+
#endif
181+
182+
/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
183+
* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
184+
*/
185+
#ifndef CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE
186+
#define CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE (2048)
187+
#endif
188+
/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
189+
#ifndef CONFIG_USBHOST_RTL8152_ETH_MAX_TX_SIZE
190+
#define CONFIG_USBHOST_RTL8152_ETH_MAX_TX_SIZE (2048)
191+
#endif
192+
193+
#define CONFIG_USBHOST_BLUETOOTH_HCI_H4
194+
// #define CONFIG_USBHOST_BLUETOOTH_HCI_LOG
195+
196+
#ifndef CONFIG_USBHOST_BLUETOOTH_TX_SIZE
197+
#define CONFIG_USBHOST_BLUETOOTH_TX_SIZE 2048
198+
#endif
199+
#ifndef CONFIG_USBHOST_BLUETOOTH_RX_SIZE
200+
#define CONFIG_USBHOST_BLUETOOTH_RX_SIZE 2048
201+
#endif
202+
203+
/* ================ USB Device Port Configuration ================*/
204+
205+
#ifndef CONFIG_USBDEV_MAX_BUS
206+
#define CONFIG_USBDEV_MAX_BUS 1 // for now, bus num must be 1 except hpm ip
207+
#endif
208+
209+
#ifndef CONFIG_USBDEV_EP_NUM
210+
#define CONFIG_USBDEV_EP_NUM 16
211+
#endif
212+
213+
/* When your chip hardware supports high-speed and wants to initialize it in high-speed mode, the relevant IP will configure the internal or external high-speed PHY according to CONFIG_USB_HS. */
214+
// #define CONFIG_USB_HS
215+
216+
/* ---------------- FSDEV Configuration ---------------- */
217+
//#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 2 // maybe 1 or 2, many chips may have a difference
218+
219+
/* ---------------- DWC2 Configuration ---------------- */
220+
/* (5 * number of control endpoints + 8) + ((largest USB packet used / 4) + 1 for
221+
* status information) + (2 * number of OUT endpoints) + 1 for Global NAK
222+
*/
223+
// #define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (1024 / 4)
224+
/* IN Endpoints Max packet Size / 4 */
225+
// #define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4)
226+
// #define CONFIG_USB_DWC2_TX1_FIFO_SIZE (1024 / 4)
227+
// #define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4)
228+
// #define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4)
229+
// #define CONFIG_USB_DWC2_TX4_FIFO_SIZE (0 / 4)
230+
// #define CONFIG_USB_DWC2_TX5_FIFO_SIZE (0 / 4)
231+
// #define CONFIG_USB_DWC2_TX6_FIFO_SIZE (0 / 4)
232+
// #define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4)
233+
// #define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4)
234+
235+
// #define CONFIG_USB_DWC2_DMA_ENABLE
236+
237+
/* ---------------- MUSB Configuration ---------------- */
238+
// #define CONFIG_USB_MUSB_SUNXI
239+
240+
/* ================ USB Host Port Configuration ==================*/
241+
#ifndef CONFIG_USBHOST_MAX_BUS
242+
#define CONFIG_USBHOST_MAX_BUS 1
243+
#endif
244+
245+
#ifndef CONFIG_USBHOST_PIPE_NUM
246+
#define CONFIG_USBHOST_PIPE_NUM 15
247+
#endif
248+
249+
/* ---------------- EHCI Configuration ---------------- */
250+
251+
#define CONFIG_USB_EHCI_HCCR_OFFSET (0x0)
252+
#define CONFIG_USB_EHCI_FRAME_LIST_SIZE 1024
253+
#define CONFIG_USB_EHCI_QH_NUM CONFIG_USBHOST_PIPE_NUM
254+
#define CONFIG_USB_EHCI_QTD_NUM 3
255+
#define CONFIG_USB_EHCI_ITD_NUM 20
256+
// #define CONFIG_USB_EHCI_HCOR_RESERVED_DISABLE
257+
// #define CONFIG_USB_EHCI_CONFIGFLAG
258+
// #define CONFIG_USB_EHCI_ISO
259+
// #define CONFIG_USB_EHCI_WITH_OHCI
260+
261+
/* ---------------- OHCI Configuration ---------------- */
262+
#define CONFIG_USB_OHCI_HCOR_OFFSET (0x0)
263+
264+
/* ---------------- XHCI Configuration ---------------- */
265+
#define CONFIG_USB_XHCI_HCCR_OFFSET (0x0)
266+
267+
/* ---------------- DWC2 Configuration ---------------- */
268+
/* largest non-periodic USB packet used / 4 */
269+
// #define CONFIG_USB_DWC2_NPTX_FIFO_SIZE (512 / 4)
270+
/* largest periodic USB packet used / 4 */
271+
// #define CONFIG_USB_DWC2_PTX_FIFO_SIZE (1024 / 4)
272+
/*
273+
* (largest USB packet used / 4) + 1 for status information + 1 transfer complete +
274+
* 1 location each for Bulk/Control endpoint for handling NAK/NYET scenario
275+
*/
276+
// #define CONFIG_USB_DWC2_RX_FIFO_SIZE ((1012 - CONFIG_USB_DWC2_NPTX_FIFO_SIZE - CONFIG_USB_DWC2_PTX_FIFO_SIZE))
277+
278+
/* ---------------- MUSB Configuration ---------------- */
279+
// #define CONFIG_USB_MUSB_SUNXI
280+
281+
/* ================ USB Dcache Configuration ==================*/
282+
283+
#ifdef CONFIG_USB_DCACHE_ENABLE
284+
/* style 1*/
285+
// void usb_dcache_clean(uintptr_t addr, uint32_t size);
286+
// void usb_dcache_invalidate(uintptr_t addr, uint32_t size);
287+
// void usb_dcache_flush(uintptr_t addr, uint32_t size);
288+
289+
/* style 2*/
290+
// #define usb_dcache_clean(addr, size)
291+
// #define usb_dcache_invalidate(addr, size)
292+
// #define usb_dcache_flush(addr, size)
293+
#endif
294+
295+
#endif

‎usb/cherryusb/host/CMakeLists.txt‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
if (NOT FREERTOS_KERNEL_PATH AND NOT DEFINED ENV{FREERTOS_KERNEL_PATH})
2+
message("Skipping FreeRTOS examples as FREERTOS_KERNEL_PATH not defined")
3+
return()
4+
endif()
5+
6+
include(FreeRTOS_Kernel_import.cmake)
7+
8+
add_subdirectory(host_cdc_msc_hid)

0 commit comments

Comments
 (0)