Commit a930596
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[GPU] Allow host buffer access for Xe2+ iGPUs (#32912)
### Description of the issue
Integrated GPUs starting from Xe2 can benefit from reusing the
host-sided buffer for the weights. This allows to avoid the allocation
of the device-sided buffer in the same physical memory with significant
memory footprint reduction and no runtime penalty. Previously it was
enabled only for LNL (#31600), but for AI weights that don't benefit
from compression there's no need to limit this functionality only to
that platform.
#### Reproduction step and snapshot
- $ benchmark_app -d GPU -hint latency -nireq 1 -t 30 -b 1 -m <model>
-ip f32 -op f32
Check for the "Compile model ram used" metric. For an fp16 stable
diffusion model with size of 600MB, there is a ~600MB on multiple
platforms, more details in the ticket.
#### Checklist
- [x] Is it a proper fix? (not a workaround)
- [ ] Did you include test case for this fix, if necessary?
- [ ] Did you review existing test that can be extended to cover this
scenario? Which test did you review?
### Tickets:
- [CVS-176845](https://jira.devtools.intel.com/browse/CVS-176845)1 parent a0c5fa3 commit a930596
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