Problems with ST7920 in SPI HW mode

[strud]

Hello

I have a project using an ESP32 WROOM module, ST7920 with SPI connection and a radio module sharing the same SPI bus.

When I initialise the ST7920 with the below I get some output on the display but is is corrupted badly.

U8G2_ST7920_128X64_F_HW_SPI u8g2(U8G2_R0,VCS);

When I construct using the Soft SPI constructor, the screen work great but the Radio SPI interface is not functional

U8G2_ST7920_128X64_F_SW_SPI u8g2(U8G2_R0, VCLK, VMOSI, /* CS=*/ VCS);`

So I have 2 questions:

1. What is going on in the Soft SPI library that prevents other SPI devices from operating on the same bus?
2. What is likely the issue when using the HW SPI constructor to cause the screen to partially work with a lot of corruption?
3. Are there any configurable parameters in the SW SPI interface?

It seems that maybe the issue can be resolved for one of the interface types, I just don't know which way to head next.

On my logic analyser it seems the clock is about 10MHz in Soft SPI mode, in HW mode it looks to be 1MHz.

Regards

Craig

[olikraus]

What is going on in the Soft SPI library that prevents other SPI devices from operating on the same bus?

U8g2 reconfigures the pins for software bit banging. Additionally HW SPI must be disabled (usually). So you have one lib requiring an active SPI subsystem and another library (u8g2) expecting a disable SPI subsystem. Neither u8g2 would always disable SPI nor would your other lib enable SPI all the time.
Simply said, no library is prepared for this so this is in general impossible (it is especially not a fault by u8g2).

What is likely the issue when using the HW SPI constructor to cause the screen to partially work with a lot of corruption?

Two most important reasons is "timing" and "voltage level" (ST7920 expects 5V logic levels!)

Are there any configurable parameters in the SW SPI interface?

Yes, but it will not help to allow SW SPI together with a HW SPI device.

On my logic analyser it seems the clock is about 10MHz in Soft SPI mode, in HW mode it looks to be 1MHz.

Strange, I personally would expect that HW SPI is faster.

[strud]

Hi olikraus,

Thanks for the answers.

Looks like the only possible route will be to try and get the HW SPI interface working without corruption.

The voltage level is not an issue since the same hardware works fine with the SW SPI interface. The ST7920 I am using is configured for 3.3V logic level.

So when you say timing, could you mean the SPI Mode?

Are you able to point to the file where the HW SPI interface is implemented? I am happy to have a look at this to see what options I might have. I would very much like to keep using your library if possible.

[strud]

One more data point.

I have tried using the HW SPI interface now with my other device disabled (library not instantiated) and the display shows major corruption.

Therefore there must be an issue somewhere (with how the HW SPI is being configured, maybe by me) here since with the SW SPI interface it is working perfectly.

[olikraus]

Therefore there must be an issue somewhere

You could start to reduce bus speed with u8g2.setBusClock (https://github.com/olikraus/u8g2/wiki/u8g2reference#setbusclock).
You could try value of "u8g2.setBusClock(1000000)" or even lower to see whether the artefacts disapear.

[strud]

So I have only just discovered that this display strangely uses a logic level high for Chip Select !!!

I have been able to make the system work with both devices (display and radio) on the same SPI bus by doing the following:

• Use the UG82 SW SPI interface
• Manually setting the display CS to low prior to any Radio module communications

Thanks for your responses and suggestions. I was not expecting an inverted CS level though, this was the real issue here.

[olikraus]

Ok , but CS is usually controlled by u8g2 and shouldn't be shared with other devices.

[strud]

So scrub my previous comments, I had not properly re-instated the radio function calls.

The way I have not got it all to work properly is to use the HW SPI library and turn down the clock freq to 500kHz. Now both SPI devices are working fine on the same bus.

I will get my DSO onto the clock line to see if it is ringing etc, if so maybe I can resolve this with some damping.

Otherwise, happy to leave as is.