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Adds support for 256 and 512 bit vectors throughout the compiler. Generally has exactly the same semantics as 128 bit vectors, but larger. About half of the diff (+5k loc) is from enabling AVX/AVX2 in
simdgen
.simd_beta
. The basic tests for 128-bit have been duplicated for 256, but none of the operations in the other tests are implemented yet. AVX and AVX2 architecture extensions have been added and are enabled by default, since we already enable other Haswell extensions.simd_alpha
. They do not yet have tests and their usage will trigger a fatal error in emit. The AVX512F extension is also disabled by default.Todo (before review):
For later PRs: