Skip to content

Commit f54b3f9

Browse files
author
aurel32
committed
HPPA (PA-RISC) host support
(Stuart Brady) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4199 c046a42c-6fe2-441c-8c8c-71466251a162
1 parent 339dea2 commit f54b3f9

File tree

17 files changed

+4505
-13
lines changed

17 files changed

+4505
-13
lines changed

Makefile.target

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -128,6 +128,11 @@ ifeq ($(ARCH),alpha)
128128
CFLAGS+=-msmall-data
129129
endif
130130

131+
ifeq ($(ARCH),hppa)
132+
OP_CFLAGS=-O1 -fno-delayed-branch
133+
BASE_LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld
134+
endif
135+
131136
ifeq ($(ARCH),ia64)
132137
CFLAGS+=-mno-sdata
133138
OP_CFLAGS+=-mno-sdata
@@ -267,6 +272,9 @@ endif
267272
ifeq ($(findstring sh4, $(TARGET_ARCH) $(ARCH)),sh4)
268273
LIBOBJS+=sh4-dis.o
269274
endif
275+
ifeq ($(findstring hppa, $(TARGET_BASE_ARCH) $(ARCH)),hppa)
276+
LIBOBJS+=hppa-dis.o
277+
endif
270278
ifeq ($(findstring s390, $(TARGET_ARCH) $(ARCH)),s390)
271279
LIBOBJS+=s390-dis.o
272280
endif

configure

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -50,6 +50,9 @@ case "$cpu" in
5050
cris)
5151
cpu="cris"
5252
;;
53+
parisc|parisc64)
54+
cpu="hppa"
55+
;;
5356
ia64)
5457
cpu="ia64"
5558
;;
@@ -576,6 +579,7 @@ else
576579

577580
# if cross compiling, cannot launch a program, so make a static guess
578581
if test "$cpu" = "armv4b" \
582+
-o "$cpu" = "hppa" \
579583
-o "$cpu" = "m68k" \
580584
-o "$cpu" = "mips" \
581585
-o "$cpu" = "mips64" \
@@ -865,6 +869,9 @@ elif test "$cpu" = "armv4l" ; then
865869
elif test "$cpu" = "cris" ; then
866870
echo "ARCH=cris" >> $config_mak
867871
echo "#define HOST_CRIS 1" >> $config_h
872+
elif test "$cpu" = "hppa" ; then
873+
echo "ARCH=hppa" >> $config_mak
874+
echo "#define HOST_HPPA 1" >> $config_h
868875
elif test "$cpu" = "ia64" ; then
869876
echo "ARCH=ia64" >> $config_mak
870877
echo "#define HOST_IA64 1" >> $config_h

cpu-all.h

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@
2020
#ifndef CPU_ALL_H
2121
#define CPU_ALL_H
2222

23-
#if defined(__arm__) || defined(__sparc__) || defined(__mips__)
23+
#if defined(__arm__) || defined(__sparc__) || defined(__mips__) || defined(__hppa__)
2424
#define WORDS_ALIGNED
2525
#endif
2626

@@ -952,6 +952,15 @@ static inline int64_t cpu_get_real_ticks(void)
952952
return val;
953953
}
954954

955+
#elif defined(__hppa__)
956+
957+
static inline int64_t cpu_get_real_ticks(void)
958+
{
959+
int val;
960+
asm volatile ("mfctl %%cr16, %0" : "=r"(val));
961+
return val;
962+
}
963+
955964
#elif defined(__ia64)
956965

957966
static inline int64_t cpu_get_real_ticks(void)

cpu-exec.c

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -657,6 +657,17 @@ int cpu_exec(CPUState *env1)
657657
"o0", "o1", "o2", "o3", "o4", "o5",
658658
"l0", "l1", "l2", "l3", "l4", "l5",
659659
"l6", "l7");
660+
#elif defined(__hppa__)
661+
asm volatile ("ble 0(%%sr4,%1)\n"
662+
"copy %%r31,%%r18\n"
663+
"copy %%r28,%0\n"
664+
: "=r" (T0)
665+
: "r" (gen_func)
666+
: "r1", "r2", "r3", "r4", "r5", "r6", "r7",
667+
"r8", "r9", "r10", "r11", "r12", "r13",
668+
"r18", "r19", "r20", "r21", "r22", "r23",
669+
"r24", "r25", "r26", "r27", "r28", "r29",
670+
"r30", "r31");
660671
#elif defined(__arm__)
661672
asm volatile ("mov pc, %0\n\t"
662673
".global exec_loop\n\t"
@@ -1488,6 +1499,24 @@ int cpu_signal_handler(int host_signum, void *pinfo,
14881499
is_write, &uc->uc_sigmask, puc);
14891500
}
14901501

1502+
#elif defined(__hppa__)
1503+
1504+
int cpu_signal_handler(int host_signum, void *pinfo,
1505+
void *puc)
1506+
{
1507+
struct siginfo *info = pinfo;
1508+
struct ucontext *uc = puc;
1509+
unsigned long pc;
1510+
int is_write;
1511+
1512+
pc = uc->uc_mcontext.sc_iaoq[0];
1513+
/* FIXME: compute is_write */
1514+
is_write = 0;
1515+
return handle_cpu_signal(pc, (unsigned long)info->si_addr,
1516+
is_write,
1517+
&uc->uc_sigmask, puc);
1518+
}
1519+
14911520
#else
14921521

14931522
#error host CPU specific signal handler needed

dis-asm.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -157,6 +157,10 @@ enum bfd_architecture
157157
#define bfd_mach_ppc_7400 7400
158158
bfd_arch_rs6000, /* IBM RS/6000 */
159159
bfd_arch_hppa, /* HP PA RISC */
160+
#define bfd_mach_hppa10 10
161+
#define bfd_mach_hppa11 11
162+
#define bfd_mach_hppa20 20
163+
#define bfd_mach_hppa20w 25
160164
bfd_arch_d10v, /* Mitsubishi D10V */
161165
bfd_arch_z8k, /* Zilog Z8000 */
162166
#define bfd_mach_z8001 1

disas.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -279,6 +279,8 @@ void disas(FILE *out, void *code, unsigned long size)
279279
print_insn = print_insn_m68k;
280280
#elif defined(__s390__)
281281
print_insn = print_insn_s390;
282+
#elif defined(__hppa__)
283+
print_insn = print_insn_hppa;
282284
#else
283285
fprintf(out, "0x%lx: Asm output not supported on this arch\n",
284286
(long) code);

dyngen-exec.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -124,6 +124,11 @@ extern int printf(const char *, ...);
124124
#define AREG1 "r4"
125125
#define AREG2 "r5"
126126
#define AREG3 "r6"
127+
#elif defined(__hppa__)
128+
#define AREG0 "r17"
129+
#define AREG1 "r14"
130+
#define AREG2 "r15"
131+
#define AREG3 "r16"
127132
#elif defined(__mips__)
128133
#define AREG0 "fp"
129134
#define AREG1 "s0"
@@ -279,6 +284,8 @@ extern int __op_jmp0, __op_jmp1, __op_jmp2, __op_jmp3;
279284
#elif defined(__mips__)
280285
#define EXIT_TB() asm volatile ("jr $ra")
281286
#define GOTO_LABEL_PARAM(n) asm volatile (".set noat; la $1, " ASM_NAME(__op_gen_label) #n "; jr $1; .set at")
287+
#elif defined(__hppa__)
288+
#define GOTO_LABEL_PARAM(n) asm volatile ("b,n " ASM_NAME(__op_gen_label) #n)
282289
#else
283290
#error unsupported CPU
284291
#endif

dyngen.c

Lines changed: 127 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -117,6 +117,13 @@
117117
#define elf_check_arch(x) ((x) == EM_68K)
118118
#define ELF_USES_RELOCA
119119

120+
#elif defined(HOST_HPPA)
121+
122+
#define ELF_CLASS ELFCLASS32
123+
#define ELF_ARCH EM_PARISC
124+
#define elf_check_arch(x) ((x) == EM_PARISC)
125+
#define ELF_USES_RELOCA
126+
120127
#elif defined(HOST_MIPS)
121128

122129
#define ELF_CLASS ELFCLASS32
@@ -1223,7 +1230,7 @@ int get_reloc_expr(char *name, int name_size, const char *sym_name)
12231230
snprintf(name, name_size, "param%s", p);
12241231
return 1;
12251232
} else {
1226-
#ifdef HOST_SPARC
1233+
#if defined(HOST_SPARC) || defined(HOST_HPPA)
12271234
if (sym_name[0] == '.')
12281235
snprintf(name, name_size,
12291236
"(long)(&__dot_%s)",
@@ -1661,6 +1668,43 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
16611668
error("rts expected at the end of %s", name);
16621669
copy_size = p - p_start;
16631670
}
1671+
#elif defined(HOST_HPPA)
1672+
{
1673+
uint8_t *p;
1674+
p = p_start;
1675+
while (p < p_end) {
1676+
uint32_t insn = get32((uint32_t *)p);
1677+
if (insn == 0x6bc23fd9 || /* stw rp,-14(sp) */
1678+
insn == 0x08030241 || /* copy r3,r1 */
1679+
insn == 0x081e0243 || /* copy sp,r3 */
1680+
(insn & 0xffffc000) == 0x37de0000 || /* ldo x(sp),sp */
1681+
(insn & 0xffffc000) == 0x6fc10000) /* stwm r1,x(sp) */
1682+
p += 4;
1683+
else
1684+
break;
1685+
}
1686+
start_offset += p - p_start;
1687+
p_start = p;
1688+
p = p_end - 4;
1689+
1690+
while (p > p_start) {
1691+
uint32_t insn = get32((uint32_t *)p);
1692+
if ((insn & 0xffffc000) == 0x347e0000 || /* ldo x(r3),sp */
1693+
(insn & 0xffe0c000) == 0x4fc00000 || /* ldwm x(sp),rx */
1694+
(insn & 0xffffc000) == 0x37de0000 || /* ldo x(sp),sp */
1695+
insn == 0x48623fd9 || /* ldw -14(r3),rp */
1696+
insn == 0xe840c000 || /* bv r0(rp) */
1697+
insn == 0xe840c002) /* bv,n r0(rp) */
1698+
p -= 4;
1699+
else
1700+
break;
1701+
}
1702+
p += 4;
1703+
if (p <= p_start)
1704+
error("empty code for %s", name);
1705+
1706+
copy_size = p - p_start;
1707+
}
16641708
#elif defined(HOST_MIPS) || defined(HOST_MIPS64)
16651709
{
16661710
#define INSN_RETURN 0x03e00008
@@ -1746,7 +1790,7 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
17461790
!strstart(sym_name, "__op_param", NULL) &&
17471791
!strstart(sym_name, "__op_jmp", NULL) &&
17481792
!strstart(sym_name, "__op_gen_label", NULL)) {
1749-
#if defined(HOST_SPARC)
1793+
#if defined(HOST_SPARC) || defined(HOST_HPPA)
17501794
if (sym_name[0] == '.') {
17511795
fprintf(outfile,
17521796
"extern char __dot_%s __asm__(\"%s\");\n",
@@ -1774,8 +1818,13 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
17741818
}
17751819
}
17761820

1821+
#ifdef __hppa__
1822+
fprintf(outfile, " memcpy(gen_code_ptr, (void *)((char *)__canonicalize_funcptr_for_compare(%s)+%d), %d);\n",
1823+
name, (int)(start_offset - offset), copy_size);
1824+
#else
17771825
fprintf(outfile, " memcpy(gen_code_ptr, (void *)((char *)&%s+%d), %d);\n",
17781826
name, (int)(start_offset - offset), copy_size);
1827+
#endif
17791828

17801829
/* emit code offset information */
17811830
{
@@ -2581,6 +2630,82 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
25812630
}
25822631
}
25832632
}
2633+
#elif defined(HOST_HPPA)
2634+
{
2635+
char relname[256];
2636+
int type, is_label;
2637+
int addend;
2638+
int reloc_offset;
2639+
for (i = 0, rel = relocs; i < nb_relocs; i++, rel++) {
2640+
if (rel->r_offset >= start_offset &&
2641+
rel->r_offset < start_offset + copy_size) {
2642+
sym_name = get_rel_sym_name(rel);
2643+
sym_name = strtab + symtab[ELF32_R_SYM(rel->r_info)].st_name;
2644+
is_label = get_reloc_expr(relname, sizeof(relname), sym_name);
2645+
type = ELF32_R_TYPE(rel->r_info);
2646+
addend = rel->r_addend;
2647+
reloc_offset = rel->r_offset - start_offset;
2648+
2649+
if (is_label) {
2650+
switch (type) {
2651+
case R_PARISC_PCREL17F:
2652+
fprintf(outfile,
2653+
" tcg_out_reloc(s, gen_code_ptr + %d, %d, %s, %d);\n",
2654+
reloc_offset, type, relname, addend);
2655+
break;
2656+
default:
2657+
error("unsupported hppa label relocation (%d)", type);
2658+
}
2659+
} else {
2660+
switch (type) {
2661+
case R_PARISC_DIR21L:
2662+
fprintf(outfile,
2663+
" hppa_patch21l((uint32_t *)(gen_code_ptr + %d), %s, %d);\n",
2664+
reloc_offset, relname, addend);
2665+
break;
2666+
case R_PARISC_DIR14R:
2667+
fprintf(outfile,
2668+
" hppa_patch14r((uint32_t *)(gen_code_ptr + %d), %s, %d);\n",
2669+
reloc_offset, relname, addend);
2670+
break;
2671+
case R_PARISC_PCREL17F:
2672+
if (strstart(sym_name, "__op_gen_label", NULL)) {
2673+
fprintf(outfile,
2674+
" hppa_patch17f((uint32_t *)(gen_code_ptr + %d), %s, %d);\n",
2675+
reloc_offset, relname, addend);
2676+
} else {
2677+
fprintf(outfile,
2678+
" HPPA_RECORD_BRANCH(hppa_stubs, (uint32_t *)(gen_code_ptr + %d), %s);\n",
2679+
reloc_offset, relname);
2680+
}
2681+
break;
2682+
case R_PARISC_DPREL21L:
2683+
if (strstart(sym_name, "__op_param", &p))
2684+
fprintf(outfile,
2685+
" hppa_load_imm21l((uint32_t *)(gen_code_ptr + %d), param%s, %d);\n",
2686+
reloc_offset, p, addend);
2687+
else
2688+
fprintf(outfile,
2689+
" hppa_patch21l_dprel((uint32_t *)(gen_code_ptr + %d), %s, %d);\n",
2690+
reloc_offset, relname, addend);
2691+
break;
2692+
case R_PARISC_DPREL14R:
2693+
if (strstart(sym_name, "__op_param", &p))
2694+
fprintf(outfile,
2695+
" hppa_load_imm14r((uint32_t *)(gen_code_ptr + %d), param%s, %d);\n",
2696+
reloc_offset, p, addend);
2697+
else
2698+
fprintf(outfile,
2699+
" hppa_patch14r_dprel((uint32_t *)(gen_code_ptr + %d), %s, %d);\n",
2700+
reloc_offset, relname, addend);
2701+
break;
2702+
default:
2703+
error("unsupported hppa relocation (%d)", type);
2704+
}
2705+
}
2706+
}
2707+
}
2708+
}
25842709
#elif defined(HOST_MIPS) || defined(HOST_MIPS64)
25852710
{
25862711
for (i = 0, rel = relocs; i < nb_relocs; i++, rel++) {

0 commit comments

Comments
 (0)