[fisim/crypto] Add instruction skip simulator

This only works for a debug enabled FPGA/chip and is only been tested on a CW340!

Add a script to load the pentest framework, connect to OpenOCD, and connect to GDB.
Generate a trace file of a called function.
Use the trace file to insert instruction skips in order to simulate fault attacks and test countermeasures.

Signed-off-by: Siemen Dhooghe <[email protected]>

Author: siemen11

my-changes.patch

@@ -295,6 +295,14 @@ pentest_cryptolib_fi_asym(
     test_vectors = [],
 )
 
+pentest_cryptolib_fi_asym(
+    name = "fi_asym_cryptolib_python_gdb_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/fi:fi_asym_cryptolib_python_gdb_test",
+    test_vectors = [],
+)
+
 CRYPTOLIB_SCA_SYM_TESTVECTOR_TARGETS = [
     "//sw/host/penetrationtests/testvectors/data:sca_sym_cryptolib",
 ]

sw/device/tests/penetrationtests/BUILD

@@ -168,6 +168,26 @@ py_binary(
     ],
 )
 
+py_binary(
+    name = "fi_asym_cryptolib_python_gdb_test",
+    testonly = True,
+    srcs = ["gdb_testing/fi_asym_cryptolib_python_gdb_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+        "//third_party/openocd:openocd_bin",
+        "//util/openocd/board:cw340_ftdi.cfg",
+        "//util/openocd/target:lowrisc-earlgrey.cfg",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/fi:fi_asym_cryptolib_commands",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:gdb_controller",
+        "//sw/host/penetrationtests/python/util:targets",
+        "@rules_python//python/runfiles",
+        requirement("pycryptodome"),
+    ],
+)
+
 py_library(
     name = "fi_ibex_functions",
     srcs = ["host_scripts/fi_ibex_functions.py"],

sw/host/penetrationtests/python/fi/BUILD

@@ -0,0 +1,281 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.communication.fi_asym_cryptolib_commands import (
+    OTFIAsymCrypto,
+)
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import common_library
+from sw.host.penetrationtests.python.util.gdb_controller import GDBController
+import json
+import argparse
+import sys
+import os
+import time
+from Crypto.PublicKey import ECC
+from Crypto.Signature import DSS
+from Crypto.Hash import SHA384
+
+ignored_keys_set = set(["status"])
+opentitantool_path = ""
+iterations = 1
+repetitions = 3
+
+target = None
+asymfi = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+# Preparing the input for an invalid signature
+key = ECC.generate(curve="P-384")
+pubx = [x for x in key.pointQ.x.to_bytes(48, "little")]
+puby = [x for x in key.pointQ.y.to_bytes(48, "little")]
+message = [i for i in range(16)]
+h = SHA384.new(bytes(message))
+signer = DSS.new(key, "fips-186-3")
+signature = [x for x in signer.sign(h)]
+# Corrupted the signature for FiSim Testing
+signature[0] ^= 0x1
+r_bytes = signature[:48]
+s_bytes = signature[48:]
+r_bytes.reverse()
+s_bytes.reverse()
+cfg = 0
+trigger = 1
+h = SHA384.new(bytes(message))
+message_digest = [x for x in h.digest()]
+
+
+def trigger_testos_init(print_output=True):
+    # Initializing the testOS (setting up the alerts and accelerators)
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = asymfi.init(
+        alert_config=common_library.default_fpga_friendly_alert_config
+    )
+    if print_output:
+        print("Output from init ", device_id)
+
+
+def trigger_p384_verify():
+    asymfi.handle_p384_verify(pubx, puby, r_bytes, s_bytes, message_digest, cfg, trigger)
+
+
+def read_testos_output():
+    # Read the output from the operation
+    response = target.read_response(max_tries=500)
+    return response
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the openocd path.
+    openocd_path = r.Rlocation("lowrisc_opentitan/third_party/openocd/build_openocd/bin/openocd")
+    # Get the openocd config files.
+    # The first file is on the cw340 (this is specific to the cw340)
+    CONFIG_FILE_CHIP = r.Rlocation("lowrisc_opentitan/util/openocd/board/cw340_ftdi.cfg")
+    # The config for the earlgrey design
+    CONFIG_FILE_DESIGN = r.Rlocation("lowrisc_opentitan/util/openocd/target/lowrisc-earlgrey.cfg")
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation("lowrisc_opentitan/sw/host/opentitantool/opentitantool")
+    # The path for GDB and the default port (set up by OpenOCD)
+    # TODO change to something reliable
+    GDB_PATH = "/opt/riscv/bin//riscv32-unknown-elf-gdb"
+    GDB_PORT = 3333
+    # Directory for the trace log files
+    log_dir = os.environ.get("TEST_UNDECLARED_OUTPUTS_DIR")
+    pc_trace_file = os.path.join(log_dir, "pc_trace.log")
+    # Directory for the output results
+    test_results_file = os.path.join(log_dir, "test_results.log")
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation("lowrisc_opentitan/" + BITSTREAM)
+    # Get the firmware path.
+    firmware_path = r.Rlocation("lowrisc_opentitan/" + BOOTSTRAP)
+    # Get the disassembly path.
+    dis_path = firmware_path.replace(".img", ".dis")
+    # And the path for the elf.
+    elf_path = firmware_path.replace(".img", ".elf")
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args,
+        openocd=openocd_path,
+        openocd_chip_config=CONFIG_FILE_CHIP,
+        openocd_design_config=CONFIG_FILE_DESIGN,
+    )
+
+    target = targets.Target(target_cfg)
+    asymfi = OTFIAsymCrypto(target)
+    successful_faults = 0
+
+    # How to read outputs in this script:
+    # To view the UART output from the testOS or the chip in general, use:
+    # target.print_all() or print(read_testos_output())
+    # In order to print the OpenOCD output use print(target.read_openocd())
+    # In order to print the output from GDB use print(gdb.read_output()) or
+    # when you want to know the output from a gdb.send_command() print it:
+    # print(gdb.send_command())
+
+    try:
+        # Program the bitstream, flash the target, and set up OpenOCD
+        target.initialize_target()
+
+        # Initialize the testOS
+        trigger_testos_init()
+
+        # Connect to GDB
+        gdb = GDBController(gdb_path=GDB_PATH, gdb_port=GDB_PORT, elf_file=elf_path)
+
+        # Provide the function name and extract the start and end address from the dis file
+        function_name = "OUTLINED_FUNCTION_22"
+        # Gives back an array of hits where the function is called
+        addresses = gdb.get_function_addresses(dis_path, function_name)
+        print("Start and stop addresses of ", function_name, ": ", addresses, flush=True)
+
+        # Start the tracing
+        gdb.send_command("-exec-interrupt")
+        # We pick the second address hit
+        gdb.setup_pc_trace(pc_trace_file, addresses[1][0], addresses[1][1])
+        print("setting trace done ... ", flush=True)
+        # Remove the output so far
+        gdb.dump_output()
+        gdb.send_command("-exec-continue")
+
+        # Trigger the p384 verify from the testOS (we do not read its output)
+        trigger_p384_verify()
+
+        # We set a minute as timeout
+        timeout = 60
+        start_time = time.time()
+        stopped = False
+
+        # Run the tracing to get the trace log
+        while time.time() - start_time < timeout:
+            output = gdb.read_output(timeout=0.5)
+            if "PC trace complete" in output:
+                print("\nTrace complete", flush=True)
+                stopped = True
+                break
+        if not stopped:
+            print("No final break point found, stopping")
+            sys.exit(1)
+
+        # Parse the trace log to get all PCs in a list
+        pc_list = gdb.parse_pc_trace_file(pc_trace_file)
+        print("Tracing has a total of", len(pc_list), "PCs", flush=True)
+
+        if len(pc_list) <= 0:
+            print("Found no tracing, stopping")
+            sys.exit(1)
+
+        # Reset the connection of GDB
+        gdb.close_gdb()
+        gdb = GDBController(gdb_path=GDB_PATH, gdb_port=GDB_PORT, elf_file=elf_path)
+
+        # Reset the target, flush the output, and init again
+        gdb.reset_target()
+        target.dump_all()
+        trigger_testos_init(print_output=False)
+        # Flush GDB and OpenOCD
+        openocd_response = target.read_openocd()
+        gdb.close_gdb()
+
+        # Open the results file
+        test_results = open(test_results_file, "w")
+
+        idx = 0
+
+        while idx < len(pc_list) - 1:
+            print("-" * 80)
+            print("Applying instruction skip in ", pc_list[idx], flush=True)
+            print("-" * 80)
+
+            gdb = GDBController(gdb_path=GDB_PATH, gdb_port=GDB_PORT)
+            gdb.dump_output()
+
+            gdb.send_command("-exec-interrupt")
+            # TODO Instead of giving pc_list[idx + 1], parse the dis and go to the next instruction
+            # TODO Provide observation points for GDB to check the state instead of relying on UART
+            gdb.apply_instruction_skip(pc_list[idx], pc_list[idx + 1])
+            gdb.send_command("-exec-continue")
+
+            # The instruction skip loop
+            trigger_p384_verify()
+            # TODO Rewrite this to rely only on GDB instead of on UART
+            time.sleep(0.02)
+            testos_response = read_testos_output()
+            try:
+                gdb_response = gdb.read_output()
+                if "instruction skip applied" in gdb_response:
+                    idx += 1
+                    print("Instruction skip applied", flush=True)
+
+                    testos_response_json = json.loads(testos_response)
+                    if testos_response_json["result"] == "True":
+                        successful_faults += 1
+                        print("-" * 80, flush=True)
+                        print("Successful FI attack!", flush=True)
+                        print("Response:", testos_response_json)
+                        print("Location:", pc_list[idx])
+                        print("-" * 80, flush=True)
+                        test_results.write(f"{pc_list[idx]}: {testos_response_json}\n")
+                    else:
+                        print(
+                            "Unsuccessful attack, output was: ",
+                            testos_response_json,
+                            flush=True,
+                        )
+                else:
+                    print("No break point found, something went wrong", flush=True)
+
+                gdb.close_gdb()  # 0.5s
+                gdb = GDBController(gdb_path=GDB_PATH, gdb_port=GDB_PORT, elf_file=elf_path)  # 0.1s
+                gdb.reset_target()  # 0.01s
+                target.dump_all()  # 1.35s
+                trigger_testos_init(print_output=False)  # 0.4s
+                gdb.close_gdb()  # 0.5s
+            except json.JSONDecodeError:
+                print("Error: JSON decoding failed. Invalid response format.", flush=True)
+                gdb.close_gdb()
+                gdb = GDBController(gdb_path=GDB_PATH, gdb_port=GDB_PORT, elf_file=elf_path)
+                gdb.reset_target()
+                target.dump_all()
+                trigger_testos_init(print_output=False)
+                gdb.close_gdb()
+            except KeyError as e:
+                print(f"Error: Required key {e} is missing in the JSON response.", flush=True)
+                gdb.close_gdb()
+                gdb = GDBController(gdb_path=GDB_PATH, gdb_port=GDB_PORT, elf_file=elf_path)
+                gdb.reset_target()
+                target.dump_all()
+                trigger_testos_init(print_output=False)
+                gdb.close_gdb()
+
+    finally:
+        print("-" * 80)
+        print("Trace data is logged in ", pc_trace_file, flush=True)
+        print("Instruction skip results are logged in ", test_results_file, flush=True)
+        print(f"There were a total of {successful_faults} successful faults", flush=True)
+        print("You can find the dissassembly in ", dis_path, flush=True)
+        # Close the OpenOCD and GDB connection at the end
+        target.close_openocd()

sw/host/penetrationtests/python/fi/gdb_testing/fi_asym_cryptolib_python_gdb_test.py

@@ -30,3 +30,8 @@ py_library(
     name = "hyperdebug",
     srcs = ["hyperdebug.py"],
 )
+
+py_library(
+    name = "gdb_controller",
+    srcs = ["gdb_controller.py"],
+)