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Razer6andreaskurth
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[darjeeling] Darjeeling has no EDN in AST
Signed-off-by: Robert Schilling <[email protected]>
1 parent 4112557 commit a0a015b

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8 files changed

+30
-188
lines changed

8 files changed

+30
-188
lines changed

hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson

Lines changed: 16 additions & 81 deletions
Original file line numberDiff line numberDiff line change
@@ -2550,7 +2550,7 @@
25502550
inst_name: alert_handler
25512551
default: ""
25522552
top_signame: edn0_edn
2553-
index: 4
2553+
index: 3
25542554
}
25552555
{
25562556
name: esc_rx
@@ -3888,11 +3888,6 @@
38883888
clock: io_div4
38893889
group: secure
38903890
}
3891-
clk_ast_es_i:
3892-
{
3893-
clock: main
3894-
group: secure
3895-
}
38963891
clk_ast_rng_i:
38973892
{
38983893
clock: main
@@ -3917,11 +3912,6 @@
39173912
name: lc_io_div4
39183913
domain: "0"
39193914
}
3920-
rst_ast_es_ni:
3921-
{
3922-
name: lc
3923-
domain: "0"
3924-
}
39253915
rst_ast_rng_ni:
39263916
{
39273917
name: lc
@@ -3939,7 +3929,6 @@
39393929
clk_ast_tlul_i: clkmgr_aon_clocks.clk_io_div4_infra
39403930
clk_ast_adc_i: clkmgr_aon_clocks.clk_aon_peri
39413931
clk_ast_alert_i: clkmgr_aon_clocks.clk_io_div4_secure
3942-
clk_ast_es_i: clkmgr_aon_clocks.clk_main_secure
39433932
clk_ast_rng_i: clkmgr_aon_clocks.clk_main_secure
39443933
}
39453934
param_decl: {}
@@ -5399,7 +5388,7 @@
53995388
inst_name: aes
54005389
default: ""
54015390
top_signame: edn0_edn
5402-
index: 5
5391+
index: 4
54035392
}
54045393
{
54055394
name: keymgr_key
@@ -5716,7 +5705,7 @@
57165705
inst_name: kmac
57175706
default: ""
57185707
top_signame: edn0_edn
5719-
index: 3
5708+
index: 2
57205709
}
57215710
{
57225711
name: idle
@@ -5946,7 +5935,7 @@
59465935
inst_name: otbn
59475936
default: ""
59485937
top_signame: edn0_edn
5949-
index: 6
5938+
index: 5
59505939
}
59515940
{
59525941
name: idle
@@ -6968,8 +6957,8 @@
69686957
width: 8
69696958
default: "'0"
69706959
inst_name: edn0
6971-
end_idx: -1
6972-
top_type: one-to-N
6960+
end_idx: 7
6961+
top_type: partial-one-to-N
69736962
top_signame: edn0_edn
69746963
index: -1
69756964
}
@@ -11533,7 +11522,7 @@
1153311522
inst_name: rv_core_ibex
1153411523
default: ""
1153511524
top_signame: edn0_edn
11536-
index: 7
11525+
index: 6
1153711526
}
1153811527
{
1153911528
name: icache_otp_key
@@ -11620,20 +11609,6 @@
1162011609
name: ast
1162111610
inter_signal_list:
1162211611
[
11623-
{
11624-
struct: edn
11625-
type: req_rsp
11626-
name: edn
11627-
act: rsp
11628-
package: edn_pkg
11629-
inst_name: ast
11630-
width: 1
11631-
default: ""
11632-
top_signame: edn0_edn
11633-
index: 2
11634-
external: true
11635-
conn_type: true
11636-
}
1163711612
{
1163811613
struct: lc_tx
1163911614
type: uni
@@ -11804,7 +11779,6 @@
1180411779
[
1180511780
keymgr_dpe.edn
1180611781
otp_ctrl.edn
11807-
ast.edn
1180811782
kmac.entropy
1180911783
alert_handler.edn
1181011784
aes.edn
@@ -12384,7 +12358,6 @@
1238412358
]
1238512359
external:
1238612360
{
12387-
ast.edn: ""
1238812361
ast.lc_dft_en: ""
1238912362
ast.lc_hw_debug_en: ""
1239012363
ast.obs_ctrl: obs_ctrl
@@ -22430,7 +22403,7 @@
2243022403
inst_name: alert_handler
2243122404
default: ""
2243222405
top_signame: edn0_edn
22433-
index: 4
22406+
index: 3
2243422407
}
2243522408
{
2243622409
name: esc_rx
@@ -24189,7 +24162,7 @@
2418924162
inst_name: aes
2419024163
default: ""
2419124164
top_signame: edn0_edn
24192-
index: 5
24165+
index: 4
2419324166
}
2419424167
{
2419524168
name: keymgr_key
@@ -24287,7 +24260,7 @@
2428724260
inst_name: kmac
2428824261
default: ""
2428924262
top_signame: edn0_edn
24290-
index: 3
24263+
index: 2
2429124264
}
2429224265
{
2429324266
name: idle
@@ -24374,7 +24347,7 @@
2437424347
inst_name: otbn
2437524348
default: ""
2437624349
top_signame: edn0_edn
24377-
index: 6
24350+
index: 5
2437824351
}
2437924352
{
2438024353
name: idle
@@ -25025,8 +24998,8 @@
2502524998
width: 8
2502624999
default: "'0"
2502725000
inst_name: edn0
25028-
end_idx: -1
25029-
top_type: one-to-N
25001+
end_idx: 7
25002+
top_type: partial-one-to-N
2503025003
top_signame: edn0_edn
2503125004
index: -1
2503225005
}
@@ -27500,7 +27473,7 @@
2750027473
inst_name: rv_core_ibex
2750127474
default: ""
2750227475
top_signame: edn0_edn
27503-
index: 7
27476+
index: 6
2750427477
}
2750527478
{
2750627479
name: icache_otp_key
@@ -28618,20 +28591,6 @@
2861828591
top_signame: soc_dbg_ctrl_jtag_tl
2861928592
index: -1
2862028593
}
28621-
{
28622-
struct: edn
28623-
type: req_rsp
28624-
name: edn
28625-
act: rsp
28626-
package: edn_pkg
28627-
inst_name: ast
28628-
width: 1
28629-
default: ""
28630-
top_signame: edn0_edn
28631-
index: 2
28632-
external: true
28633-
conn_type: true
28634-
}
2863528594
{
2863628595
struct: lc_tx
2863728596
type: uni
@@ -28679,30 +28638,6 @@
2867928638
]
2868028639
external:
2868128640
[
28682-
{
28683-
package: edn_pkg
28684-
struct: edn_req
28685-
signame: ast_edn_req_i
28686-
width: 1
28687-
type: req_rsp
28688-
default: ""
28689-
direction: in
28690-
conn_type: true
28691-
index: 2
28692-
netname: edn0_edn_req
28693-
}
28694-
{
28695-
package: edn_pkg
28696-
struct: edn_rsp
28697-
signame: ast_edn_rsp_o
28698-
width: 1
28699-
type: req_rsp
28700-
default: ""
28701-
direction: out
28702-
conn_type: true
28703-
index: 2
28704-
netname: edn0_edn_rsp
28705-
}
2870628641
{
2870728642
package: lc_ctrl_pkg
2870828643
struct: lc_tx
@@ -30596,7 +30531,7 @@
3059630531
signame: edn0_edn_req
3059730532
width: 8
3059830533
type: req_rsp
30599-
end_idx: -1
30534+
end_idx: 7
3060030535
act: rsp
3060130536
suffix: req
3060230537
default: "'0"
@@ -30607,7 +30542,7 @@
3060730542
signame: edn0_edn_rsp
3060830543
width: 8
3060930544
type: req_rsp
30610-
end_idx: -1
30545+
end_idx: 7
3061130546
act: rsp
3061230547
suffix: rsp
3061330548
default: ""

hw/top_darjeeling/data/top_darjeeling.hjson

Lines changed: 1 addition & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -580,10 +580,6 @@
580580
clock: "io_div4",
581581
group: "secure"
582582
}
583-
clk_ast_es_i: {
584-
clock: "main",
585-
group: "secure"
586-
}
587583
clk_ast_rng_i: {
588584
clock: "main",
589585
group: "secure"
@@ -603,10 +599,6 @@
603599
name: "lc_io_div4",
604600
domain: "0",
605601
},
606-
rst_ast_es_ni: {
607-
name: "lc",
608-
domain: "0",
609-
},
610602
rst_ast_rng_ni: {
611603
name: "lc",
612604
domain: "0",
@@ -1166,15 +1158,6 @@
11661158
port: [
11671159
{ name: "ast",
11681160
inter_signal_list: [
1169-
{ struct: "edn",
1170-
type: "req_rsp",
1171-
name: "edn",
1172-
// The activity direction for a port inter-signal is "opposite" of
1173-
// what the external module actually needs.
1174-
act: "rsp",
1175-
package: "edn_pkg",
1176-
},
1177-
11781161
{ struct: "lc_tx",
11791162
type: "uni",
11801163
name: "lc_dft_en",
@@ -1261,7 +1244,7 @@
12611244
'otbn.lc_rma_ack' : ['lc_ctrl.lc_flash_rma_ack'],
12621245

12631246
// Edn connections
1264-
'edn0.edn' : ['keymgr_dpe.edn', 'otp_ctrl.edn', 'ast.edn', 'kmac.entropy',
1247+
'edn0.edn' : ['keymgr_dpe.edn', 'otp_ctrl.edn', 'kmac.entropy',
12651248
'alert_handler.edn', 'aes.edn', 'otbn.edn_urnd',
12661249
'rv_core_ibex.edn'],
12671250
'edn1.edn' : ['otbn.edn_rnd'],
@@ -1411,7 +1394,6 @@
14111394

14121395
// ext is to create port in the top.
14131396
'external': {
1414-
'ast.edn' : '',
14151397
'ast.lc_dft_en' : '',
14161398
'ast.lc_hw_debug_en' : '',
14171399
'ast.obs_ctrl' : 'obs_ctrl',

hw/top_darjeeling/ip/ast/data/ast.hjson

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,6 @@
2121
{ clock: "clk_ast_tlul_i", reset: "rst_ast_tlul_ni", primary: true },
2222
{ clock: "clk_ast_adc_i", reset: "rst_ast_adc_ni"},
2323
{ clock: "clk_ast_alert_i", reset: "rst_ast_alert_ni"},
24-
{ clock: "clk_ast_es_i", reset: "rst_ast_es_ni"},
2524
{ clock: "clk_ast_rng_i", reset: "rst_ast_rng_ni"},
2625
],
2726
bus_interfaces: [

hw/top_darjeeling/ip/ast/rtl/ast.sv

Lines changed: 0 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -28,8 +28,6 @@ module ast
2828
input rst_ast_adc_ni, // Buffered AST ADC Reset
2929
input clk_ast_alert_i, // Buffered AST Alert Clock
3030
input rst_ast_alert_ni, // Buffered AST Alert Reset
31-
input clk_ast_es_i, // Buffered AST Entropy Source Clock
32-
input rst_ast_es_ni, // Buffered AST Entropy Source Reset
3331
input clk_ast_rng_i, // Buffered AST RNG Clock
3432
input rst_ast_rng_ni, // Buffered AST RNG Reset
3533
input clk_ast_tlul_i, // Buffered AST TLUL Clock
@@ -109,10 +107,6 @@ module ast
109107
output logic rng_val_o, // RNG Valid
110108
output logic [EntropyStreams-1:0] rng_b_o, // RNG Bit(s)
111109

112-
// entropy distribution interface
113-
input edn_pkg::edn_rsp_t entropy_rsp_i, // Entropy Response
114-
output edn_pkg::edn_req_t entropy_req_o, // Entropy Request
115-
116110
// alerts
117111
input ast_pkg::ast_alert_rsp_t alert_rsp_i, // Alerts Trigger & Acknowledge Inputs
118112
output ast_pkg::ast_alert_req_t alert_req_o, // Alerts Output
@@ -599,8 +593,6 @@ adc #(
599593
///////////////////////////////////////
600594
// Entropy (Always ON)
601595
///////////////////////////////////////
602-
localparam int EntropyRateWidth = 4;
603-
logic [EntropyRateWidth-1:0] entropy_rate;
604596
logic vcmain_pok_por_sys, rst_src_sys_n;
605597

606598
// Sync clk_src_sys_jen_i to clk_sys
@@ -629,35 +621,6 @@ prim_flop_2sync #(
629621

630622
assign rst_src_sys_n = scan_mode ? scan_reset_n : vcmain_pok_por_sys;
631623

632-
`ifndef SYNTHESIS
633-
logic [EntropyRateWidth-1:0] dv_entropy_rate_value;
634-
635-
initial begin : erate_plusargs
636-
dv_entropy_rate_value = EntropyRateWidth'($urandom_range(0, (2**EntropyRateWidth -1)));
637-
void'($value$plusargs("entropy_rate_value=%0d", dv_entropy_rate_value));
638-
`ASSERT_I(DvErateValueCheck, dv_entropy_rate_value inside {[0:(2**EntropyRateWidth -1)]})
639-
end
640-
641-
assign entropy_rate = dv_entropy_rate_value;
642-
`else
643-
assign entropy_rate = EntropyRateWidth'(5);
644-
`endif
645-
646-
ast_entropy #(
647-
.EntropyRateWidth ( EntropyRateWidth )
648-
) u_entropy (
649-
.entropy_rsp_i ( entropy_rsp_i ),
650-
.entropy_rate_i ( entropy_rate[EntropyRateWidth-1:0] ),
651-
.clk_ast_es_i ( clk_ast_es_i ),
652-
.rst_ast_es_ni ( rst_ast_es_ni ),
653-
.clk_src_sys_i ( clk_sys ),
654-
.rst_src_sys_ni ( rst_src_sys_n ),
655-
.clk_src_sys_val_i ( clk_src_sys_val_o ),
656-
.clk_src_sys_jen_i ( prim_mubi_pkg::mubi4_test_true_loose(clk_src_sys_jen) ),
657-
.entropy_req_o ( entropy_req_o )
658-
);
659-
660-
661624
///////////////////////////////////////
662625
// RNG (Always ON)
663626
///////////////////////////////////////
@@ -1005,9 +968,6 @@ assign ast2pad_t1_ao = 1'bz;
1005968
`ASSERT_KNOWN(FlashPowerDownKnownO_A, flash_power_down_h_o, 1, ast_pwst_o.main_pok)
1006969
`ASSERT_KNOWN(FlashPowerReadyKnownO_A, flash_power_ready_h_o, 1, ast_pwst_o.main_pok)
1007970
`ASSERT_KNOWN(OtpPowerSeqKnownO_A, otp_power_seq_h_o, 1, ast_pwst_o.main_pok)
1008-
//
1009-
// ES
1010-
`ASSERT_KNOWN(EntropyReeqKnownO_A, entropy_req_o, clk_ast_es_i,rst_ast_es_ni)
1011971
// Alerts
1012972
`ASSERT_KNOWN(AlertReqKnownO_A, alert_req_o, clk_ast_alert_i, rst_ast_alert_ni)
1013973
// DPRAM/SPRAM

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