diff --git a/llvm/lib/Analysis/DemandedBits.cpp b/llvm/lib/Analysis/DemandedBits.cpp index 6694d5cc06c8c..2cafd32098032 100644 --- a/llvm/lib/Analysis/DemandedBits.cpp +++ b/llvm/lib/Analysis/DemandedBits.cpp @@ -76,6 +76,15 @@ void DemandedBits::determineLiveOperandBits( computeKnownBits(V2, Known2, DL, &AC, UserI, &DT); } }; + auto GetShiftedRange = [&](unsigned Min, unsigned Max, bool ShiftLeft) { + using ShiftFn = APInt (APInt::*)(unsigned) const; + auto Shift = ShiftLeft ? static_cast(&APInt::shl) + : static_cast(&APInt::lshr); + AB = APInt::getZero(BitWidth); + for (unsigned ShiftAmount = Min; ShiftAmount <= Max; ++ShiftAmount) { + AB |= (AOut.*Shift)(ShiftAmount); + } + }; switch (UserI->getOpcode()) { default: break; @@ -183,6 +192,17 @@ void DemandedBits::determineLiveOperandBits( AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1); else if (S->hasNoUnsignedWrap()) AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt); + } else { + ComputeKnownBits(BitWidth, UserI->getOperand(1), nullptr); + unsigned Min = Known.getMinValue().getLimitedValue(BitWidth - 1); + unsigned Max = Known.getMaxValue().getLimitedValue(BitWidth - 1); + // similar to Lshr case + GetShiftedRange(Min, Max, /*ShiftLeft=*/false); + const auto *S = cast(UserI); + if (S->hasNoSignedWrap()) + AB |= APInt::getHighBitsSet(BitWidth, Max + 1); + else if (S->hasNoUnsignedWrap()) + AB |= APInt::getHighBitsSet(BitWidth, Max); } } break; @@ -197,6 +217,20 @@ void DemandedBits::determineLiveOperandBits( // (they must be zero). if (cast(UserI)->isExact()) AB |= APInt::getLowBitsSet(BitWidth, ShiftAmt); + } else { + ComputeKnownBits(BitWidth, UserI->getOperand(1), nullptr); + unsigned Min = Known.getMinValue().getLimitedValue(BitWidth - 1); + unsigned Max = Known.getMaxValue().getLimitedValue(BitWidth - 1); + // Suppose AOut == 0b0000 1001 + // [min, max] = [1, 3] + // shift by 1 we get 0b0001 0010 + // shift by 2 we get 0b0010 0100 + // shift by 3 we get 0b0100 1000 + // we take the or for every shift to cover all the positions. + // + GetShiftedRange(Min, Max, /*ShiftLeft=*/true); + if (cast(UserI)->isExact()) + AB |= APInt::getLowBitsSet(BitWidth, Max); } } break; @@ -217,6 +251,26 @@ void DemandedBits::determineLiveOperandBits( // (they must be zero). if (cast(UserI)->isExact()) AB |= APInt::getLowBitsSet(BitWidth, ShiftAmt); + } else { + ComputeKnownBits(BitWidth, UserI->getOperand(1), nullptr); + unsigned Min = Known.getMinValue().getLimitedValue(BitWidth - 1); + unsigned Max = Known.getMaxValue().getLimitedValue(BitWidth - 1); + GetShiftedRange(Min, Max, /*ShiftLeft=*/true); + if (Max) { + // Suppose AOut = 0011 1100 + // [min, max] = [1, 3] + // ShiftAmount = 1 : Mask is 1000 0000 + // ShiftAmount = 2 : Mask is 1100 0000 + // ShiftAmount = 3 : Mask is 1110 0000 + // The Mask with Max covers every case in [min, max], + // so we are done + if ((AOut & APInt::getHighBitsSet(BitWidth, Max)).getBoolValue()) + AB.setSignBit(); + } + // If the shift is exact, then the low bits are not dead + // (they must be zero). + if (cast(UserI)->isExact()) + AB |= APInt::getLowBitsSet(BitWidth, Max); } } break; diff --git a/llvm/test/Analysis/DemandedBits/ashr.ll b/llvm/test/Analysis/DemandedBits/ashr.ll new file mode 100644 index 0000000000000..6185d4c492d86 --- /dev/null +++ b/llvm/test/Analysis/DemandedBits/ashr.ll @@ -0,0 +1,198 @@ +; RUN: opt -S -disable-output -passes="print" < %s 2>&1 | FileCheck %s + +define i8 @test_ashr_const_amount_4(i32 %a) { +; CHECK-LABEL: 'test_ashr_const_amount_4' +; CHECK-DAG: DemandedBits: 0xff for %ashr = ashr i32 %a, 4 +; CHECK-DAG: DemandedBits: 0xff0 for %a in %ashr = ashr i32 %a, 4 +; CHECK-DAG: DemandedBits: 0xffffffff for 4 in %ashr = ashr i32 %a, 4 +; CHECK-DAG: DemandedBits: 0xff for %ashr.t = trunc i32 %ashr to i8 +; CHECK-DAG: DemandedBits: 0xff for %ashr in %ashr.t = trunc i32 %ashr to i8 +; + %ashr = ashr i32 %a, 4 + %ashr.t = trunc i32 %ashr to i8 + ret i8 %ashr.t +} + +define i8 @test_ashr_const_amount_5(i32 %a) { +; CHECK-LABEL: 'test_ashr_const_amount_5' +; CHECK-DAG: DemandedBits: 0xff for %ashr = ashr i32 %a, 5 +; CHECK-DAG: DemandedBits: 0x1fe0 for %a in %ashr = ashr i32 %a, 5 +; CHECK-DAG: DemandedBits: 0xffffffff for 5 in %ashr = ashr i32 %a, 5 +; CHECK-DAG: DemandedBits: 0xff for %ashr.t = trunc i32 %ashr to i8 +; CHECK-DAG: DemandedBits: 0xff for %ashr in %ashr.t = trunc i32 %ashr to i8 +; + %ashr = ashr i32 %a, 5 + %ashr.t = trunc i32 %ashr to i8 + ret i8 %ashr.t +} + +define i8 @test_ashr_const_amount_8(i32 %a) { +; CHECK-LABEL: 'test_ashr_const_amount_8' +; CHECK-DAG: DemandedBits: 0xff for %ashr = ashr i32 %a, 8 +; CHECK-DAG: DemandedBits: 0xff00 for %a in %ashr = ashr i32 %a, 8 +; CHECK-DAG: DemandedBits: 0xffffffff for 8 in %ashr = ashr i32 %a, 8 +; CHECK-DAG: DemandedBits: 0xff for %ashr.t = trunc i32 %ashr to i8 +; CHECK-DAG: DemandedBits: 0xff for %ashr in %ashr.t = trunc i32 %ashr to i8 +; + %ashr = ashr i32 %a, 8 + %ashr.t = trunc i32 %ashr to i8 + ret i8 %ashr.t +} + +define i8 @test_ashr_const_amount_9(i32 %a) { + +; CHECK-LABEL: 'test_ashr_const_amount_9' +; CHECK-DAG: DemandedBits: 0xff for %ashr.t = trunc i32 %ashr to i8 +; CHECK-DAG: DemandedBits: 0xff for %ashr in %ashr.t = trunc i32 %ashr to i8 +; CHECK-DAG: DemandedBits: 0xff for %ashr = ashr i32 %a, 8 +; CHECK-DAG: DemandedBits: 0xff00 for %a in %ashr = ashr i32 %a, 8 +; CHECK-DAG: DemandedBits: 0xffffffff for 8 in %ashr = ashr i32 %a, 8 +; + %ashr = ashr i32 %a, 8 + %ashr.t = trunc i32 %ashr to i8 + ret i8 %ashr.t +} + +define i8 @test_ashr(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_ashr' +; CHECK-DAG: DemandedBits: 0xff for %ashr = ashr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %a in %ashr = ashr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %ashr = ashr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xff for %ashr.t = trunc i32 %ashr to i8 +; CHECK-DAG: DemandedBits: 0xff for %ashr in %ashr.t = trunc i32 %ashr to i8 +; + %ashr = ashr i32 %a, %b + %ashr.t = trunc i32 %ashr to i8 + ret i8 %ashr.t +} + +define i8 @test_ashr_range_1(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_ashr_range_1' +; CHECK-DAG: DemandedBits: 0xff for %shl.t = trunc i32 %ashr to i8 +; CHECK-DAG: DemandedBits: 0xff for %ashr in %shl.t = trunc i32 %ashr to i8 +; CHECK-DAG: DemandedBits: 0xffffffff for %b2 = and i32 %b, 3 +; CHECK-DAG: DemandedBits: 0x3 for %b in %b2 = and i32 %b, 3 +; CHECK-DAG: DemandedBits: 0xffffffff for 3 in %b2 = and i32 %b, 3 +; CHECK-DAG: DemandedBits: 0xff for %ashr = ashr i32 %a, %b2 +; CHECK-DAG: DemandedBits: 0x7ff for %a in %ashr = ashr i32 %a, %b2 +; CHECK-DAG: DemandedBits: 0xffffffff for %b2 in %ashr = ashr i32 %a, %b2 +; + %b2 = and i32 %b, 3 + %ashr = ashr i32 %a, %b2 + %shl.t = trunc i32 %ashr to i8 + ret i8 %shl.t +} + +define i32 @test_ashr_range_2(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_ashr_range_2' +; CHECK-DAG: DemandedBits: 0xffffffff for %b2 = and i32 %b, 3 +; CHECK-DAG: DemandedBits: 0x3 for %b in %b2 = and i32 %b, 3 +; CHECK-DAG: DemandedBits: 0xffffffff for 3 in %b2 = and i32 %b, 3 +; CHECK-DAG: DemandedBits: 0xffffffff for %ashr = ashr i32 %a, %b2 +; CHECK-DAG: DemandedBits: 0xffffffff for %a in %ashr = ashr i32 %a, %b2 +; CHECK-DAG: DemandedBits: 0xffffffff for %b2 in %ashr = ashr i32 %a, %b2 +; + %b2 = and i32 %b, 3 + %ashr = ashr i32 %a, %b2 + ret i32 %ashr +} + +define i32 @test_ashr_range_3(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_ashr_range_3' +; CHECK-DAG: DemandedBits: 0xffff for %ashr = ashr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %a in %ashr = ashr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %ashr = ashr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %shl = shl i32 %ashr, 16 +; CHECK-DAG: DemandedBits: 0xffff for %ashr in %shl = shl i32 %ashr, 16 +; CHECK-DAG: DemandedBits: 0xffffffff for 16 in %shl = shl i32 %ashr, 16 +; + %ashr = ashr i32 %a, %b + %shl = shl i32 %ashr, 16 + ret i32 %shl +} +define i32 @test_ashr_range_4(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_ashr_range_4' +; CHECK-DAG: DemandedBits: 0xffffffff for %shr = lshr i32 %ashr, 8 +; CHECK-DAG: DemandedBits: 0xffffff00 for %ashr in %shr = lshr i32 %ashr, 8 +; CHECK-DAG: DemandedBits: 0xffffffff for 8 in %shr = lshr i32 %ashr, 8 +; CHECK-DAG: DemandedBits: 0xffffff00 for %ashr = ashr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffff00 for %a in %ashr = ashr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %ashr = ashr i32 %a, %b + %ashr = ashr i32 %a, %b + %shr = lshr i32 %ashr, 8 + ret i32 %shr +} + +define i32 @test_ashr_range_5(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_ashr_range_5' +; CHECK-DAG: DemandedBits: 0xffffffff for %2 = and i32 %1, 255 +; CHECK-DAG: DemandedBits: 0xff for %1 in %2 = and i32 %1, 255 +; CHECK-DAG: DemandedBits: 0xffffffff for 255 in %2 = and i32 %1, 255 +; CHECK-DAG: DemandedBits: 0xff for %1 = ashr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %a in %1 = ashr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %1 = ashr i32 %a, %b +; + %1 = ashr i32 %a, %b + %2 = and i32 %1, 255 + ret i32 %2 +} + +define i32 @test_ashr_range_6(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_ashr_range_6' +; CHECK-DAG: DemandedBits: 0xffff0000 for %lshr.1 = ashr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffff0000 for %a in %lshr.1 = ashr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %lshr.1 = ashr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %lshr.2 = ashr i32 %lshr.1, 16 +; CHECK-DAG: DemandedBits: 0xffff0000 for %lshr.1 in %lshr.2 = ashr i32 %lshr.1, 16 +; CHECK-DAG: DemandedBits: 0xffffffff for 16 in %lshr.2 = ashr i32 %lshr.1, 16 +; + %lshr.1 = ashr i32 %a, %b + %lshr.2 = ashr i32 %lshr.1, 16 + ret i32 %lshr.2 +} + +define i8 @test_ashr_var_amount(i32 %a, i32 %b){ +; CHECK-LABEL: 'test_ashr_var_amount' +; CHECK-DAG: DemandedBits: 0xff for %4 = ashr i32 %1, %3 +; CHECK-DAG: DemandedBits: 0xffffffff for %1 in %4 = ashr i32 %1, %3 +; CHECK-DAG: DemandedBits: 0xffffffff for %3 in %4 = ashr i32 %1, %3 +; CHECK-DAG: DemandedBits: 0xff for %2 = trunc i32 %1 to i8 +; CHECK-DAG: DemandedBits: 0xff for %1 in %2 = trunc i32 %1 to i8 +; CHECK-DAG: DemandedBits: 0xffffffff for %1 = add nsw i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %a in %1 = add nsw i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %1 = add nsw i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %3 = zext i8 %2 to i32 +; CHECK-DAG: DemandedBits: 0xff for %2 in %3 = zext i8 %2 to i32 +; CHECK-DAG: DemandedBits: 0xff for %5 = trunc i32 %4 to i8 +; CHECK-DAG: DemandedBits: 0xff for %4 in %5 = trunc i32 %4 to i8 +; + %1 = add nsw i32 %a, %b + %2 = trunc i32 %1 to i8 + %3 = zext i8 %2 to i32 + %4 = ashr i32 %1, %3 + %5 = trunc i32 %4 to i8 + ret i8 %5 +} + +define i8 @test_ashr_var_amount_nsw(i32 %a, i32 %b){ + ; CHECK-LABEL 'test_ashr_var_amount_nsw' + ; CHECK-DAG: DemandedBits: 0xff for %5 = trunc i32 %4 to i8 + ; CHECK-DAG: DemandedBits: 0xff for %4 in %5 = trunc i32 %4 to i8 + ; CHECK-DAG: DemandedBits: 0xffffffff for %1 = add nsw i32 %a, %b + ; CHECK-DAG: DemandedBits: 0xffffffff for %a in %1 = add nsw i32 %a, %b + ; CHECK-DAG: DemandedBits: 0xffffffff for %b in %1 = add nsw i32 %a, %b + ; CHECK-DAG: DemandedBits: 0xff for %2 = trunc i32 %1 to i8 + ; CHECK-DAG: DemandedBits: 0xff for %1 in %2 = trunc i32 %1 to i8 + ; CHECK-DAG: DemandedBits: 0xffffffff for %3 = zext i8 %2 to i32 + ; CHECK-DAG: DemandedBits: 0xff for %2 in %3 = zext i8 %2 to i32 + ; CHECK-DAG: DemandedBits: 0xff for %4 = ashr exact i32 %1, %3 + ; CHECK-DAG: DemandedBits: 0xffffffff for %1 in %4 = ashr exact i32 %1, %3 + ; CHECK-DAG: DemandedBits: 0xffffffff for %3 in %4 = ashr exact i32 %1, %3 + ; + %1 = add nsw i32 %a, %b + %2 = trunc i32 %1 to i8 + %3 = zext i8 %2 to i32 + %4 = ashr exact i32 %1, %3 + %5 = trunc i32 %4 to i8 + ret i8 %5 +} diff --git a/llvm/test/Analysis/DemandedBits/lshr.ll b/llvm/test/Analysis/DemandedBits/lshr.ll new file mode 100644 index 0000000000000..e07f994a1b304 --- /dev/null +++ b/llvm/test/Analysis/DemandedBits/lshr.ll @@ -0,0 +1,198 @@ +; RUN: opt -S -disable-output -passes="print" < %s 2>&1 | FileCheck %s + +define i8 @test_lshr_const_amount_4(i32 %a) { +; CHECK-LABEL: 'test_lshr_const_amount_4' +; CHECK-DAG: DemandedBits: 0xff for %lshr.t = trunc i32 %lshr to i8 +; CHECK-DAG: DemandedBits: 0xff for %lshr in %lshr.t = trunc i32 %lshr to i8 +; CHECK-DAG: DemandedBits: 0xff for %lshr = lshr i32 %a, 4 +; CHECK-DAG: DemandedBits: 0xff0 for %a in %lshr = lshr i32 %a, 4 +; CHECK-DAG: DemandedBits: 0xffffffff for 4 in %lshr = lshr i32 %a, 4 +; + %lshr = lshr i32 %a, 4 + %lshr.t = trunc i32 %lshr to i8 + ret i8 %lshr.t +} + +define i8 @test_lshr_const_amount_5(i32 %a) { +; CHECK-LABEL: 'test_lshr_const_amount_5' +; CHECK-DAG: DemandedBits: 0xff for %lshr = lshr i32 %a, 5 +; CHECK-DAG: DemandedBits: 0x1fe0 for %a in %lshr = lshr i32 %a, 5 +; CHECK-DAG: DemandedBits: 0xffffffff for 5 in %lshr = lshr i32 %a, 5 +; CHECK-DAG: DemandedBits: 0xff for %lshr.t = trunc i32 %lshr to i8 +; CHECK-DAG: DemandedBits: 0xff for %lshr in %lshr.t = trunc i32 %lshr to i8 +; + %lshr = lshr i32 %a, 5 + %lshr.t = trunc i32 %lshr to i8 + ret i8 %lshr.t +} +define i8 @test_lshr_const_amount_8(i32 %a) { +; CHECK-LABEL: 'test_lshr_const_amount_8' +; CHECK-DAG: DemandedBits: 0xff for %lshr.t = trunc i32 %lshr to i8 +; CHECK-DAG: DemandedBits: 0xff for %lshr in %lshr.t = trunc i32 %lshr to i8 +; CHECK-DAG: DemandedBits: 0xff for %lshr = lshr i32 %a, 8 +; CHECK-DAG: DemandedBits: 0xff00 for %a in %lshr = lshr i32 %a, 8 +; CHECK-DAG: DemandedBits: 0xffffffff for 8 in %lshr = lshr i32 %a, 8 +; + %lshr = lshr i32 %a, 8 + %lshr.t = trunc i32 %lshr to i8 + ret i8 %lshr.t +} + +define i8 @test_lshr_const_amount_9(i32 %a) { +; CHECK-LABEL: 'test_lshr_const_amount_9' +; CHECK-DAG: DemandedBits: 0xff for %lshr.t = trunc i32 %lshr to i8 +; CHECK-DAG: DemandedBits: 0xff for %lshr in %lshr.t = trunc i32 %lshr to i8 +; CHECK-DAG: DemandedBits: 0xff for %lshr = lshr i32 %a, 9 +; CHECK-DAG: DemandedBits: 0x1fe00 for %a in %lshr = lshr i32 %a, 9 +; CHECK-DAG: DemandedBits: 0xffffffff for 9 in %lshr = lshr i32 %a, 9 +; + %lshr = lshr i32 %a, 9 + %lshr.t = trunc i32 %lshr to i8 + ret i8 %lshr.t +} + +define i8 @test_lshr(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_lshr' +; CHECK-DAG: DemandedBits: 0xff for %lshr = lshr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %a in %lshr = lshr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %lshr = lshr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xff for %lshr.t = trunc i32 %lshr to i8 +; CHECK-DAG: DemandedBits: 0xff for %lshr in %lshr.t = trunc i32 %lshr to i8 +; + %lshr = lshr i32 %a, %b + %lshr.t = trunc i32 %lshr to i8 + ret i8 %lshr.t +} + +define i8 @test_lshr_range_1(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_lshr_range_1' +; CHECK-DAG: DemandedBits: 0xff for %shl.t = trunc i32 %lshr to i8 +; CHECK-DAG: DemandedBits: 0xff for %lshr in %shl.t = trunc i32 %lshr to i8 +; CHECK-DAG: DemandedBits: 0xff for %lshr = lshr i32 %a, %b2 +; CHECK-DAG: DemandedBits: 0x7ff for %a in %lshr = lshr i32 %a, %b2 +; CHECK-DAG: DemandedBits: 0xffffffff for %b2 in %lshr = lshr i32 %a, %b2 +; CHECK-DAG: DemandedBits: 0xffffffff for %b2 = and i32 %b, 3 +; CHECK-DAG: DemandedBits: 0x3 for %b in %b2 = and i32 %b, 3 +; CHECK-DAG: DemandedBits: 0xffffffff for 3 in %b2 = and i32 %b, 3 +; + %b2 = and i32 %b, 3 + %lshr = lshr i32 %a, %b2 + %shl.t = trunc i32 %lshr to i8 + ret i8 %shl.t +} + +define i32 @test_lshr_range_2(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_lshr_range_2' +; CHECK-DAG: DemandedBits: 0xffffffff for %lshr = lshr i32 %a, %b2 +; CHECK-DAG: DemandedBits: 0xffffffff for %a in %lshr = lshr i32 %a, %b2 +; CHECK-DAG: DemandedBits: 0xffffffff for %b2 in %lshr = lshr i32 %a, %b2 +; CHECK-DAG: DemandedBits: 0xffffffff for %b2 = and i32 %b, 3 +; CHECK-DAG: DemandedBits: 0x3 for %b in %b2 = and i32 %b, 3 +; CHECK-DAG: DemandedBits: 0xffffffff for 3 in %b2 = and i32 %b, 3 +; + %b2 = and i32 %b, 3 + %lshr = lshr i32 %a, %b2 + ret i32 %lshr +} + +define i32 @test_lshr_range_3(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_lshr_range_3' +; CHECK-DAG: DemandedBits: 0xffff for %lshr = lshr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %a in %lshr = lshr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %lshr = lshr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %shl = shl i32 %lshr, 16 +; CHECK-DAG: DemandedBits: 0xffff for %lshr in %shl = shl i32 %lshr, 16 +; CHECK-DAG: DemandedBits: 0xffffffff for 16 in %shl = shl i32 %lshr, 16 +; + %lshr = lshr i32 %a, %b + %shl = shl i32 %lshr, 16 + ret i32 %shl +} + +define i32 @test_lshr_range_4(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_lshr_range_4' +; CHECK-DAG: DemandedBits: 0xffffff00 for %lshr = lshr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffff00 for %a in %lshr = lshr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %lshr = lshr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %shr = ashr i32 %lshr, 8 +; CHECK-DAG: DemandedBits: 0xffffff00 for %lshr in %shr = ashr i32 %lshr, 8 +; CHECK-DAG: DemandedBits: 0xffffffff for 8 in %shr = ashr i32 %lshr, 8 + %lshr = lshr i32 %a, %b + %shr = ashr i32 %lshr, 8 + ret i32 %shr +} + +define i32 @test_lshr_range_5(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_lshr_range_5' +; CHECK-DAG: DemandedBits: 0xff for %1 = lshr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %a in %1 = lshr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %1 = lshr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %2 = and i32 %1, 255 +; CHECK-DAG: DemandedBits: 0xff for %1 in %2 = and i32 %1, 255 +; CHECK-DAG: DemandedBits: 0xffffffff for 255 in %2 = and i32 %1, 255 +; + %1 = lshr i32 %a, %b + %2 = and i32 %1, 255 + ret i32 %2 +} + +define i32 @test_lshr_range_6(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_lshr_range_6' +; CHECK-DAG: DemandedBits: 0xffff0000 for %lshr.1 = lshr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffff0000 for %a in %lshr.1 = lshr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %lshr.1 = lshr i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %lshr.2 = lshr i32 %lshr.1, 16 +; CHECK-DAG: DemandedBits: 0xffff0000 for %lshr.1 in %lshr.2 = lshr i32 %lshr.1, 16 +; CHECK-DAG: DemandedBits: 0xffffffff for 16 in %lshr.2 = lshr i32 %lshr.1, 16 +; + %lshr.1 = lshr i32 %a, %b + %lshr.2 = lshr i32 %lshr.1, 16 + ret i32 %lshr.2 +} + + +define i8 @test_lshr_var_amount(i32 %a, i32 %b){ +; CHECK-LABEL: 'test_lshr_var_amount' +; CHECK-DAG: DemandedBits: 0xff for %4 = lshr i32 %1, %3 +; CHECK-DAG: DemandedBits: 0xffffffff for %1 in %4 = lshr i32 %1, %3 +; CHECK-DAG: DemandedBits: 0xffffffff for %3 in %4 = lshr i32 %1, %3 +; CHECK-DAG: DemandedBits: 0xff for %5 = trunc i32 %4 to i8 +; CHECK-DAG: DemandedBits: 0xff for %4 in %5 = trunc i32 %4 to i8 +; CHECK-DAG: DemandedBits: 0xffffffff for %3 = zext i8 %2 to i32 +; CHECK-DAG: DemandedBits: 0xff for %2 in %3 = zext i8 %2 to i32 +; CHECK-DAG: DemandedBits: 0xffffffff for %1 = add nsw i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %a in %1 = add nsw i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %1 = add nsw i32 %a, %b +; CHECK-DAG: DemandedBits: 0xff for %2 = trunc i32 %1 to i8 +; CHECK-DAG: DemandedBits: 0xff for %1 in %2 = trunc i32 %1 to i8 +; + %1 = add nsw i32 %a, %b + %2 = trunc i32 %1 to i8 + %3 = zext i8 %2 to i32 + %4 = lshr i32 %1, %3 + %5 = trunc i32 %4 to i8 + ret i8 %5 +} + +define i8 @test_lshr_var_amount_exact(i32 %a, i32 %b){ + ; CHECK-LABEL 'test_lshr_var_amount_nsw' + ; CHECK-DAG: DemandedBits: 0xffffffff for %1 = add nsw i32 %a, %b + ; CHECK-DAG: DemandedBits: 0xffffffff for %a in %1 = add nsw i32 %a, %b + ; CHECK-DAG: DemandedBits: 0xffffffff for %b in %1 = add nsw i32 %a, %b + ; CHECK-DAG: DemandedBits: 0xff for %2 = trunc i32 %1 to i8 + ; CHECK-DAG: DemandedBits: 0xff for %1 in %2 = trunc i32 %1 to i8 + ; CHECK-DAG: DemandedBits: 0xffffffff for %3 = zext i8 %2 to i32 + ; CHECK-DAG: DemandedBits: 0xff for %2 in %3 = zext i8 %2 to i32 + ; CHECK-DAG: DemandedBits: 0xff for %4 = lshr exact i32 %1, %3 + ; CHECK-DAG: DemandedBits: 0xffffffff for %1 in %4 = lshr exact i32 %1, %3 + ; CHECK-DAG: DemandedBits: 0xffffffff for %3 in %4 = lshr exact i32 %1, %3 + ; CHECK-DAG: DemandedBits: 0xff for %5 = trunc i32 %4 to i8 + ; CHECK-DAG: DemandedBits: 0xff for %4 in %5 = trunc i32 %4 to i8 + ; + %1 = add nsw i32 %a, %b + %2 = trunc i32 %1 to i8 + %3 = zext i8 %2 to i32 + %4 = lshr exact i32 %1, %3 + %5 = trunc i32 %4 to i8 + ret i8 %5 +} diff --git a/llvm/test/Analysis/DemandedBits/shl.ll b/llvm/test/Analysis/DemandedBits/shl.ll index e41f5f4107735..c872d2d854e83 100644 --- a/llvm/test/Analysis/DemandedBits/shl.ll +++ b/llvm/test/Analysis/DemandedBits/shl.ll @@ -57,10 +57,142 @@ define i8 @test_shl(i32 %a, i32 %b) { ; CHECK-DAG: DemandedBits: 0xff for %shl.t = trunc i32 %shl to i8 ; CHECK-DAG: DemandedBits: 0xff for %shl in %shl.t = trunc i32 %shl to i8 ; CHECK-DAG: DemandedBits: 0xff for %shl = shl i32 %a, %b -; CHECK-DAG: DemandedBits: 0xffffffff for %a in %shl = shl i32 %a, %b +; CHECK-DAG: DemandedBits: 0xff for %a in %shl = shl i32 %a, %b ; CHECK-DAG: DemandedBits: 0xffffffff for %b in %shl = shl i32 %a, %b ; %shl = shl i32 %a, %b %shl.t = trunc i32 %shl to i8 ret i8 %shl.t } + +define i8 @test_shl_range_1(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_shl_range_1' +; CHECK-DAG: DemandedBits: 0xff for %shl = shl i32 %a, %b2 +; CHECK-DAG: DemandedBits: 0xff for %a in %shl = shl i32 %a, %b2 +; CHECK-DAG: DemandedBits: 0xffffffff for %b2 in %shl = shl i32 %a, %b2 +; CHECK-DAG: DemandedBits: 0xff for %shl.t = trunc i32 %shl to i8 +; CHECK-DAG: DemandedBits: 0xff for %shl in %shl.t = trunc i32 %shl to i8 +; CHECK-DAG: DemandedBits: 0xffffffff for %b2 = and i32 %b, 3 +; CHECK-DAG: DemandedBits: 0x3 for %b in %b2 = and i32 %b, 3 +; CHECK-DAG: DemandedBits: 0xffffffff for 3 in %b2 = and i32 %b, 3 +; + %b2 = and i32 %b, 3 + %shl = shl i32 %a, %b2 + %shl.t = trunc i32 %shl to i8 + ret i8 %shl.t +} + +define i32 @test_shl_range_2(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_shl_range_2' +; CHECK-DAG: DemandedBits: 0xffffffff for %b2 = and i32 %b, 3 +; CHECK-DAG: DemandedBits: 0x3 for %b in %b2 = and i32 %b, 3 +; CHECK-DAG: DemandedBits: 0xffffffff for 3 in %b2 = and i32 %b, 3 +; CHECK-DAG: DemandedBits: 0xffffffff for %shl = shl i32 %a, %b2 +; CHECK-DAG: DemandedBits: 0xffffffff for %a in %shl = shl i32 %a, %b2 +; CHECK-DAG: DemandedBits: 0xffffffff for %b2 in %shl = shl i32 %a, %b2 +; + %b2 = and i32 %b, 3 + %shl = shl i32 %a, %b2 + ret i32 %shl +} + +define i32 @test_shl_range_3(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_shl_range_3' +; CHECK-DAG: DemandedBits: 0xffffffff for %shr = lshr i32 %shl, 16 +; CHECK-DAG: DemandedBits: 0xffff0000 for %shl in %shr = lshr i32 %shl, 16 +; CHECK-DAG: DemandedBits: 0xffffffff for 16 in %shr = lshr i32 %shl, 16 +; CHECK-DAG: DemandedBits: 0xffff0000 for %shl = shl i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %a in %shl = shl i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %shl = shl i32 %a, %b +; + %shl = shl i32 %a, %b + %shr = lshr i32 %shl, 16 + ret i32 %shr +} + +define i32 @test_shl_range_4(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_shl_range_4' +; CHECK-DAG: DemandedBits: 0xffffffff for %shr = ashr i32 %shl, 8 +; CHECK-DAG: DemandedBits: 0xffffff00 for %shl in %shr = ashr i32 %shl, 8 +; CHECK-DAG: DemandedBits: 0xffffffff for 8 in %shr = ashr i32 %shl, 8 +; CHECK-DAG: DemandedBits: 0xffffff00 for %shl = shl i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %a in %shl = shl i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %shl = shl i32 %a, %b + %shl = shl i32 %a, %b + %shr = ashr i32 %shl, 8 + ret i32 %shr +} + +define i32 @test_shl_range_5(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_shl_range_5' +; CHECK-DAG: DemandedBits: 0xff for %1 = shl i32 %a, %b +; CHECK-DAG: DemandedBits: 0xff for %a in %1 = shl i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %1 = shl i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %2 = and i32 %1, 255 +; CHECK-DAG: DemandedBits: 0xff for %1 in %2 = and i32 %1, 255 +; CHECK-DAG: DemandedBits: 0xffffffff for 255 in %2 = and i32 %1, 255 +; + %1 = shl i32 %a, %b + %2 = and i32 %1, 255 + ret i32 %2 +} + +define i32 @test_shl_range_6(i32 %a, i32 %b) { +; CHECK-LABEL: 'test_shl_range_6' +; CHECK-DAG: DemandedBits: 0xffffffff for %shl.2 = shl i32 %shl.1, 16 +; CHECK-DAG: DemandedBits: 0xffff for %shl.1 in %shl.2 = shl i32 %shl.1, 16 +; CHECK-DAG: DemandedBits: 0xffffffff for 16 in %shl.2 = shl i32 %shl.1, 16 +; CHECK-DAG: DemandedBits: 0xffff for %shl.1 = shl i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffff for %a in %shl.1 = shl i32 %a, %b +; CHECK-DAG: DemandedBits: 0xffffffff for %b in %shl.1 = shl i32 %a, %b +; + %shl.1 = shl i32 %a, %b + %shl.2 = shl i32 %shl.1, 16 + ret i32 %shl.2 +} + +define i8 @test_shl_var_amount(i32 %a, i32 %b){ +; CHECK-LABEL: 'test_shl_var_amount' +; CHECK-DAG: DemandedBits: 0xff for %5 = trunc i32 %4 to i8 +; CHECK-DAG: DemandedBits: 0xff for %4 in %5 = trunc i32 %4 to i8 +; CHECK-DAG: DemandedBits: 0xff for %4 = shl i32 %1, %3 +; CHECK-DAG: DemandedBits: 0xff for %1 in %4 = shl i32 %1, %3 +; CHECK-DAG: DemandedBits: 0xffffffff for %3 in %4 = shl i32 %1, %3 +; CHECK-DAG: DemandedBits: 0xff for %2 = trunc i32 %1 to i8 +; CHECK-DAG: DemandedBits: 0xff for %1 in %2 = trunc i32 %1 to i8 +; CHECK-DAG: DemandedBits: 0xffffffff for %3 = zext i8 %2 to i32 +; CHECK-DAG: DemandedBits: 0xff for %2 in %3 = zext i8 %2 to i32 +; CHECK-DAG: DemandedBits: 0xff for %1 = add nsw i32 %a, %b +; CHECK-DAG: DemandedBits: 0xff for %a in %1 = add nsw i32 %a, %b +; CHECK-DAG: DemandedBits: 0xff for %b in %1 = add nsw i32 %a, %b +; + %1 = add nsw i32 %a, %b + %2 = trunc i32 %1 to i8 + %3 = zext i8 %2 to i32 + %4 = shl i32 %1, %3 + %5 = trunc i32 %4 to i8 + ret i8 %5 +} + +define i8 @test_shl_var_amount_nsw(i32 %a, i32 %b){ + ; CHECK-LABEL 'test_shl_var_amount_nsw' + ; CHECK-DAG: DemandedBits: 0xff for %5 = trunc i32 %4 to i8 + ; CHECK-DAG: DemandedBits: 0xff for %4 in %5 = trunc i32 %4 to i8 + ; CHECK-DAG: DemandedBits: 0xff for %4 = shl nsw i32 %1, %3 + ; CHECK-DAG: DemandedBits: 0xffffffff for %1 in %4 = shl nsw i32 %1, %3 + ; CHECK-DAG: DemandedBits: 0xffffffff for %3 in %4 = shl nsw i32 %1, %3 + ; CHECK-DAG: DemandedBits: 0xffffffff for %3 = zext i8 %2 to i32 + ; CHECK-DAG: DemandedBits: 0xff for %2 in %3 = zext i8 %2 to i32 + ; CHECK-DAG: DemandedBits: 0xff for %2 = trunc i32 %1 to i8 + ; CHECK-DAG: DemandedBits: 0xff for %1 in %2 = trunc i32 %1 to i8 + ; CHECK-DAG: DemandedBits: 0xffffffff for %1 = add nsw i32 %a, %b + ; CHECK-DAG: DemandedBits: 0xffffffff for %a in %1 = add nsw i32 %a, %b + ; CHECK-DAG: DemandedBits: 0xffffffff for %b in %1 = add nsw i32 %a, %b + ; + %1 = add nsw i32 %a, %b + %2 = trunc i32 %1 to i8 + %3 = zext i8 %2 to i32 + %4 = shl nsw i32 %1, %3 + %5 = trunc i32 %4 to i8 + ret i8 %5 +}