Search results

[AMDGPU] Add the code generation support for <code>llvm.[sin/cos].bf16</code>

backend:AMDGPU

Status: Open (in progress).

llvm/llvm-projectnumber 149631

#149631 In llvm/llvm-project;

· shiltian opened on Jul 19, 2025

[NFC][AMDGPU] Add an IR test for <code>v_sqrt_bf16</code>

backend:AMDGPU

Status: Open (in progress).

llvm/llvm-projectnumber 149629

#149629 In llvm/llvm-project;

· shiltian opened on Jul 19, 2025

[MI400][SDAG] Lower unsafe bf16 divisions

backend:AMDGPU

Status: Open (in progress).

llvm/llvm-projectnumber 149628

#149628 In llvm/llvm-project;

· shiltian opened on Jul 19, 2025

[NFC][AMDGPU] Add an IR test for <code>v_cvt_f16_bf8</code>

backend:AMDGPU

Status: Open (in progress).

llvm/llvm-projectnumber 149627

#149627 In llvm/llvm-project;

· shiltian opened on Jul 19, 2025

[AMDGPU] Remove generic-hsa GPU name

backend:AMDGPU

Status: Open (in progress).

llvm/llvm-projectnumber 149526

#149526 In llvm/llvm-project;

· jayfoad opened on Jul 18, 2025

[Offload] Verify SyncCycle for events in AMDGPU

backend:AMDGPU

offload

Status: Open (in progress).

llvm/llvm-projectnumber 149524

#149524 In llvm/llvm-project;

· RossBrunton opened on Jul 18, 2025

[AMDGPU] Switch default dwarf register encoding to wave32

backend:AMDGPU

debuginfo

mcMachine (object) codeMachine (object) code

Status: Open (in progress).

llvm/llvm-projectnumber 149515

#149515 In llvm/llvm-project;

· epilk opened on Jul 18, 2025

[DebugInfo][AMDGPU] Convert a debug-intrinsic method to debug records

backend:AMDGPU

Status: Open (in progress).

llvm/llvm-projectnumber 149505

#149505 In llvm/llvm-project;

· jmorse opened on Jul 18, 2025

[Offload] Make olLaunchKernel test thread safe

backend:AMDGPU

offload

Status: Open (in progress).

llvm/llvm-projectnumber 149497

#149497 In llvm/llvm-project;

· RossBrunton opened on Jul 18, 2025

[LLVM][SelectionDAG] Add poison/undef folds for signed/unsigned max/min.

backend:AArch64

backend:AMDGPU

llvm:SelectionDAGSelectionDAGISel as wellSelectionDAGISel as well

Status: Open (in progress).

llvm/llvm-projectnumber 149334

#149334 In llvm/llvm-project;

· paulwalker-arm opened on Jul 17, 2025

[MISched] Extend overridePostRASchedPolicy to support per-function scheduling direction

backend:AArch64

backend:AMDGPU

backend:PowerPC

backend:RISC-V

llvm:codegen

Status: Open (in progress).

llvm/llvm-projectnumber 149297

#149297 In llvm/llvm-project;

· harrisonGPU opened on Jul 17, 2025

[HIP][Clang][Driver] Move BC preference logic into ROCm detection

backend:AMDGPU

clangClang issues not falling into any other categoryClang issues not falling into any other category

clang:driver'clang' and 'clang++' user-facing binaries. Not 'clang-cl''clang' and 'clang++' user-facing binaries. Not 'clang-cl'

clang:openmpOpenMP related changes to ClangOpenMP related changes to Clang

Status: Open (in progress).

llvm/llvm-projectnumber 149294

#149294 In llvm/llvm-project;

· jchlanda opened on Jul 17, 2025