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[ARM] Use t2LDRLIT_ga_pcrel for loading stack guards with no-movt in PIC mode. (#156208)
When using no-movt we don't use the pcrel version of the literal load. This change also unifies logic with the ARM version of this function as well, which has: ``` if (!Subtarget.useMovt() || ForceELFGOTPIC) { // For ELF non-PIC, use GOT PIC code sequence as well because R_ARM_GOT_ABS // does not have assembler support. if (TM.isPositionIndependent() || ForceELFGOTPIC) expandLoadStackGuardBase(MI, ARM::LDRLIT_ga_pcrel, ARM::LDRi12); else expandLoadStackGuardBase(MI, ARM::LDRLIT_ga_abs, ARM::LDRi12); return; } ``` rdar://138334512
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2 files changed

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llvm/lib/Target/ARM/Thumb2InstrInfo.cpp

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -263,11 +263,14 @@ void Thumb2InstrInfo::expandLoadStackGuard(
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264264
const auto *GV = cast<GlobalValue>((*MI->memoperands_begin())->getValue());
265265
const ARMSubtarget &Subtarget = MF.getSubtarget<ARMSubtarget>();
266+
bool IsPIC = MF.getTarget().isPositionIndependent();
266267
if (Subtarget.isTargetELF() && !GV->isDSOLocal())
267268
expandLoadStackGuardBase(MI, ARM::t2LDRLIT_ga_pcrel, ARM::t2LDRi12);
268269
else if (!Subtarget.useMovt())
269-
expandLoadStackGuardBase(MI, ARM::tLDRLIT_ga_abs, ARM::t2LDRi12);
270-
else if (MF.getTarget().isPositionIndependent())
270+
expandLoadStackGuardBase(
271+
MI, IsPIC ? ARM::t2LDRLIT_ga_pcrel : ARM::tLDRLIT_ga_abs,
272+
ARM::t2LDRi12);
273+
else if (IsPIC)
271274
expandLoadStackGuardBase(MI, ARM::t2MOV_ga_pcrel, ARM::t2LDRi12);
272275
else
273276
expandLoadStackGuardBase(MI, ARM::t2MOVi32imm, ARM::t2LDRi12);

llvm/test/CodeGen/ARM/stack-guard-nomovt.ll

Lines changed: 56 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1,27 +1,63 @@
1-
; RUN: llc -relocation-model=static -mattr=+no-movt < %s | FileCheck %s
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2+
; RUN: llc -relocation-model=static -mattr=+no-movt < %s | FileCheck %s --check-prefix=STATIC
3+
; RUN: llc -relocation-model=pic -mattr=+no-movt < %s | FileCheck %s --check-prefix=PIC
24

35
target triple = "thumbv7a-linux-gnueabi"
46

57
define i32 @test1() #0 {
6-
; CHECK-LABEL: test1:
7-
; CHECK: @ %bb.0:
8-
; CHECK-NEXT: push {r7, lr}
9-
; CHECK-NEXT: sub.w sp, sp, #1032
10-
; CHECK-NEXT: ldr r0, .LCPI0_0
11-
; CHECK-NEXT: ldr r0, [r0]
12-
; CHECK-NEXT: str.w r0, [sp, #1028]
13-
; CHECK-NEXT: add r0, sp, #4
14-
; CHECK-NEXT: bl foo
15-
; CHECK-NEXT: ldr.w r0, [sp, #1028]
16-
; CHECK-NEXT: ldr r1, .LCPI0_0
17-
; CHECK-NEXT: ldr r1, [r1]
18-
; CHECK-NEXT: cmp r1, r0
19-
; CHECK-NEXT: ittt eq
20-
; CHECK-NEXT: moveq r0, #0
21-
; CHECK-NEXT: addeq.w sp, sp, #1032
22-
; CHECK-NEXT: popeq {r7, pc}
23-
; CHECK-NEXT: .LBB0_1:
24-
; CHECK-NEXT: bl __stack_chk_fail
8+
; STATIC-LABEL: test1:
9+
; STATIC: @ %bb.0:
10+
; STATIC-NEXT: push {r7, lr}
11+
; STATIC-NEXT: sub.w sp, sp, #1032
12+
; STATIC-NEXT: ldr r0, .LCPI0_0
13+
; STATIC-NEXT: ldr r0, [r0]
14+
; STATIC-NEXT: str.w r0, [sp, #1028]
15+
; STATIC-NEXT: add r0, sp, #4
16+
; STATIC-NEXT: bl foo
17+
; STATIC-NEXT: ldr.w r0, [sp, #1028]
18+
; STATIC-NEXT: ldr r1, .LCPI0_0
19+
; STATIC-NEXT: ldr r1, [r1]
20+
; STATIC-NEXT: cmp r1, r0
21+
; STATIC-NEXT: ittt eq
22+
; STATIC-NEXT: moveq r0, #0
23+
; STATIC-NEXT: addeq.w sp, sp, #1032
24+
; STATIC-NEXT: popeq {r7, pc}
25+
; STATIC-NEXT: .LBB0_1:
26+
; STATIC-NEXT: bl __stack_chk_fail
27+
; STATIC-NEXT: .p2align 2
28+
; STATIC-NEXT: @ %bb.2:
29+
; STATIC-NEXT: .LCPI0_0:
30+
; STATIC-NEXT: .long __stack_chk_guard
31+
;
32+
; PIC-LABEL: test1:
33+
; PIC: @ %bb.0:
34+
; PIC-NEXT: push {r7, lr}
35+
; PIC-NEXT: sub.w sp, sp, #1032
36+
; PIC-NEXT: ldr r0, .LCPI0_0
37+
; PIC-NEXT: .LPC0_0:
38+
; PIC-NEXT: add r0, pc
39+
; PIC-NEXT: ldr r0, [r0]
40+
; PIC-NEXT: str.w r0, [sp, #1028]
41+
; PIC-NEXT: add r0, sp, #4
42+
; PIC-NEXT: bl foo
43+
; PIC-NEXT: ldr.w r0, [sp, #1028]
44+
; PIC-NEXT: ldr r1, .LCPI0_1
45+
; PIC-NEXT: .LPC0_1:
46+
; PIC-NEXT: add r1, pc
47+
; PIC-NEXT: ldr r1, [r1]
48+
; PIC-NEXT: cmp r1, r0
49+
; PIC-NEXT: ittt eq
50+
; PIC-NEXT: moveq r0, #0
51+
; PIC-NEXT: addeq.w sp, sp, #1032
52+
; PIC-NEXT: popeq {r7, pc}
53+
; PIC-NEXT: .LBB0_1:
54+
; PIC-NEXT: bl __stack_chk_fail
55+
; PIC-NEXT: .p2align 2
56+
; PIC-NEXT: @ %bb.2:
57+
; PIC-NEXT: .LCPI0_0:
58+
; PIC-NEXT: .long __stack_chk_guard-(.LPC0_0+4)
59+
; PIC-NEXT: .LCPI0_1:
60+
; PIC-NEXT: .long __stack_chk_guard-(.LPC0_1+4)
2561
%a1 = alloca [256 x i32], align 4
2662
call void @foo(ptr %a1) #3
2763
ret i32 0

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