JTAG breakout for the Intel USB Blaster 2 used to program the headstages' MAX10 FPGA.
The dense layout required by the headstages in this repository makes exposing a FPGA programming interface challenging. We have chosen to expose a JTAG programming interface as a linear, 50 mil pitch array of small copper "test points". This programmer adapter routes JTAG signals through a set of small "pogo pins" that can reliably make a temporary electrical connection with the test point array. Additionally, it contains a AAA battery and boost converter to generate power for the headstage during programming and to illuminate a white LED on the bottom of the board that eases pogo-pin/test-point alignment.
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The BOM is located on this google sheet.