From afb986e3e58532b871f78034d1fb6dada2657903 Mon Sep 17 00:00:00 2001 From: Jakub Kuderski Date: Wed, 8 May 2024 23:36:07 -0400 Subject: [PATCH] [LLVMGPU] Remove duplicate shared memory bank conflict pass (#17322) One is enough. This was accidentally added in https://github.com/iree-org/iree/pull/16665. --- compiler/src/iree/compiler/Codegen/LLVMGPU/Passes.cpp | 1 - .../LLVMGPU/test/ROCDL/pipeline_vector_distribute.mlir | 4 ++-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/compiler/src/iree/compiler/Codegen/LLVMGPU/Passes.cpp b/compiler/src/iree/compiler/Codegen/LLVMGPU/Passes.cpp index a67054efb36a..734f00fe8c6e 100644 --- a/compiler/src/iree/compiler/Codegen/LLVMGPU/Passes.cpp +++ b/compiler/src/iree/compiler/Codegen/LLVMGPU/Passes.cpp @@ -575,7 +575,6 @@ void addGPUVectorDistributePassPipeline(OpPassManager &funcPassManager, funcPassManager.addPass( createGPUReduceSharedMemoryBankConflicts(/*paddingSizeBits=*/64)); - funcPassManager.addPass(createGPUReduceSharedMemoryBankConflicts()); if (clLLVMGPUEnablePrefetch) { funcPassManager.addPass(createLLVMGPUPrefetchSharedMemoryPass()); } diff --git a/compiler/src/iree/compiler/Codegen/LLVMGPU/test/ROCDL/pipeline_vector_distribute.mlir b/compiler/src/iree/compiler/Codegen/LLVMGPU/test/ROCDL/pipeline_vector_distribute.mlir index 1272ee2e8e2c..aaab32fb9a8f 100644 --- a/compiler/src/iree/compiler/Codegen/LLVMGPU/test/ROCDL/pipeline_vector_distribute.mlir +++ b/compiler/src/iree/compiler/Codegen/LLVMGPU/test/ROCDL/pipeline_vector_distribute.mlir @@ -407,9 +407,9 @@ hal.executable.variant @rocm target(<"rocm", "rocm-hsaco-fb", { // CHECK-LABEL: func.func @unaligned_nk_batch_matmul() // CHECK-SAME: translation_info = #[[$TRANSLATION]] -// CHECK-DAG: %[[RHS_SHARED:.+]] = memref.alloc() : memref<1x16x28xf16, #gpu.address_space> +// CHECK-DAG: %[[RHS_SHARED:.+]] = memref.alloc() : memref<1x16x20xf16, #gpu.address_space> // CHECK-DAG: %[[RHS_SHARED_SUB:.+]] = memref.subview %[[RHS_SHARED]][0, 0, 0] [1, 16, 16] [1, 1, 1] -// CHECK-DAG: %[[LHS_SHARED:.+]] = memref.alloc() : memref<1x16x28xf16, #gpu.address_space> +// CHECK-DAG: %[[LHS_SHARED:.+]] = memref.alloc() : memref<1x16x20xf16, #gpu.address_space> // CHECK-DAG: %[[LHS_SHARED_SUB:.+]] = memref.subview %[[LHS_SHARED]][0, 0, 0] [1, 16, 16] [1, 1, 1] // CHECK-DAG: %[[LHS_GLOBAL:.+]] = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : memref<64x968x1281xf16, #hal.descriptor_type> // CHECK-DAG: %[[RHS_GLOBAL:.+]] = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : memref<64x1281x1281xf16, #hal.descriptor_type>