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Revert "[RegAlloc] Relax the split constrain on MBB prolog" (#169990)
Reverts llvm/llvm-project#168259 breaks hip buildot
1 parent d3762ed commit 3a1079f

11 files changed

+3244
-3519
lines changed

llvm/lib/CodeGen/RegAllocGreedy.cpp

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -774,7 +774,8 @@ bool RAGreedy::addSplitConstraints(InterferenceCache::Cursor Intf,
774774
// Abort if the spill cannot be inserted at the MBB' start
775775
if (((BC.Entry == SpillPlacement::MustSpill) ||
776776
(BC.Entry == SpillPlacement::PrefSpill)) &&
777-
!SA->canSplitBeforeProlog(BC.Number))
777+
SlotIndex::isEarlierInstr(BI.FirstInstr,
778+
SA->getFirstSplitPoint(BC.Number)))
778779
return false;
779780
}
780781

@@ -829,7 +830,11 @@ bool RAGreedy::addThroughConstraints(InterferenceCache::Cursor Intf,
829830
BCS[B].Number = Number;
830831

831832
// Abort if the spill cannot be inserted at the MBB' start
832-
if (!SA->canSplitBeforeProlog(Number))
833+
MachineBasicBlock *MBB = MF->getBlockNumbered(Number);
834+
auto FirstNonDebugInstr = MBB->getFirstNonDebugInstr();
835+
if (FirstNonDebugInstr != MBB->end() &&
836+
SlotIndex::isEarlierInstr(LIS->getInstructionIndex(*FirstNonDebugInstr),
837+
SA->getFirstSplitPoint(Number)))
833838
return false;
834839
// Interference for the live-in value.
835840
if (Intf.first() <= Indexes->getMBBStartIdx(Number))

llvm/lib/CodeGen/SplitKit.cpp

Lines changed: 0 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -147,54 +147,6 @@ InsertPointAnalysis::getLastInsertPointIter(const LiveInterval &CurLI,
147147
return LIS.getInstructionFromIndex(LIP);
148148
}
149149

150-
bool InsertPointAnalysis::canSplitBeforeProlog(const LiveInterval &CurLI,
151-
const MachineBasicBlock &MBB) {
152-
const TargetInstrInfo *TII = MBB.getParent()->getSubtarget().getInstrInfo();
153-
154-
for (auto &MI : MBB) {
155-
if (MI.isPHI() || MI.isPosition() || MI.isDebugInstr() ||
156-
MI.isPseudoProbe())
157-
continue;
158-
159-
if (!TII->isBasicBlockPrologue(MI))
160-
return true;
161-
162-
for (auto &MO : MI.operands()) {
163-
if (!MO.isReg() || !MO.isDef() || !MO.getReg().isVirtual())
164-
continue;
165-
166-
// For the AMDGPU target if a MBB contains exec mask restore preamble,
167-
// SplitEditor may get state when it cannot insert a spill instruction
168-
// at the begin of the MBB.
169-
// E.g. for a MIR
170-
// bb.100:
171-
// %1 = S_OR_SAVEEXEC_B64 %2, implicit-def $exec, implicit-def $scc,
172-
// implicit $exec
173-
// ...
174-
// use %1
175-
// If the regalloc try to allocate a virtreg to the physreg already
176-
// assigned to virtreg %1 and the pyhsreg is computed as the best
177-
// candidate for split, it may insert COPY instruction.
178-
// bb.100:
179-
// %1 = S_OR_SAVEEXEC_B64 %2, implicit-def $exec, implicit-def $scc,
180-
// implicit $exec
181-
// %2 = COPY %orig
182-
// ...
183-
// use %1
184-
// Thus %1 and %orig still have interference. We may add cost for the
185-
// physreg candidate or abandon the candidate.
186-
const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
187-
const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();
188-
const TargetRegisterClass *RC = MRI.getRegClass(MO.getReg());
189-
const TargetRegisterClass *CurRC = MRI.getRegClass(CurLI.reg());
190-
if (TRI->getCommonSubClass(RC, CurRC))
191-
return false;
192-
}
193-
}
194-
195-
return true;
196-
}
197-
198150
//===----------------------------------------------------------------------===//
199151
// Split Analysis
200152
//===----------------------------------------------------------------------===//

llvm/lib/CodeGen/SplitKit.h

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -89,9 +89,6 @@ class LLVM_LIBRARY_VISIBILITY InsertPointAnalysis {
8989
return Res;
9090
}
9191

92-
/// Return true if we can split \pCurLI before \pMBB's prolog.
93-
bool canSplitBeforeProlog(const LiveInterval &CurLI,
94-
const MachineBasicBlock &MBB);
9592
};
9693

9794
/// SplitAnalysis - Analyze a LiveInterval, looking for live range splitting
@@ -250,11 +247,6 @@ class LLVM_LIBRARY_VISIBILITY SplitAnalysis {
250247
SlotIndex getFirstSplitPoint(unsigned Num) {
251248
return IPA.getFirstInsertPoint(*MF.getBlockNumbered(Num));
252249
}
253-
254-
bool canSplitBeforeProlog(unsigned Num) {
255-
MachineBasicBlock *BB = MF.getBlockNumbered(Num);
256-
return IPA.canSplitBeforeProlog(*CurLI, *BB);
257-
}
258250
};
259251

260252
/// SplitEditor - Edit machine code and LiveIntervals for live range

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