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rust: Enable for MIPS
Enable rust for linux by implement generate_rust_target.rs and select relevant Kconfig options. We don't use builtin target as there is no sutiable baremetal target for us that can cover all ISA variants supported by kernel. Link: Rust-for-Linux#107 Signed-off-by: Jiaxun Yang <[email protected]>
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Documentation/rust/arch-support.rst

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@@ -17,6 +17,7 @@ Architecture Level of support Constraints
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============= ================ ==============================================
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``arm64`` Maintained Little Endian only.
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``loongarch`` Maintained \-
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``mips`` Maintained \-
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``riscv`` Maintained ``riscv64`` only.
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``um`` Maintained \-
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``x86`` Maintained ``x86_64`` only.

Documentation/translations/zh_CN/rust/arch-support.rst

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@@ -21,6 +21,7 @@
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============= ================ ==============================================
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``arm64`` Maintained 只有小端序
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``loongarch`` Maintained \-
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``mips`` Maintained \-
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``riscv`` Maintained 只有 ``riscv64``
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``um`` Maintained 只有 ``x86_64``
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``x86`` Maintained 只有 ``x86_64``

arch/mips/Kconfig

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@@ -90,6 +90,8 @@ config MIPS
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select HAVE_PERF_USER_STACK_DUMP
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select HAVE_REGS_AND_STACK_ACCESS_API
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select HAVE_RSEQ
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select HAVE_RUST
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select HAVE_GENERATE_RUST_TARGET
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select HAVE_SPARSE_SYSCALL_NR
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select HAVE_STACKPROTECTOR
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select HAVE_SYSCALL_TRACEPOINTS

scripts/generate_rust_target.rs

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@@ -141,6 +141,13 @@ impl KernelConfig {
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let option = "CONFIG_".to_owned() + option;
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self.0.contains_key(&option)
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}
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/// Returns the value of the option in the configuration.
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/// The argument must be passed without the `CONFIG_` prefix.
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fn get(&self, option: &str) -> Option<&String> {
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let option = "CONFIG_".to_owned() + option;
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self.0.get(&option)
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}
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}
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fn main() {
@@ -203,6 +210,67 @@ fn main() {
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ts.push("target-pointer-width", "32");
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} else if cfg.has("LOONGARCH") {
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panic!("loongarch uses the builtin rustc loongarch64-unknown-none-softfloat target");
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} else if cfg.has("MIPS") {
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let mut features = "+soft-float,+noabicalls".to_string();
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if cfg.has("CPU_MICROMIPS") {
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features += ",+micromips";
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}
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if cfg.has("64BIT") {
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ts.push("arch", "mips64");
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ts.push("abi", "abi64");
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cfg.get("TARGET_ISA_REV").map(|isa_rev| {
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let feature = match isa_rev.as_str() {
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"1" => ",+mips64",
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"2" => ",+mips64r2",
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"5" => ",+mips64r5",
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"6" => ",+mips64r6",
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_ => ",+mips3",
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};
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features += feature;
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});
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ts.push("features", features);
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if cfg.has("CPU_BIG_ENDIAN") {
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ts.push(
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"data-layout",
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"E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128",
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);
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ts.push("llvm-target", "mips64-unknown-linux-gnuabi64");
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} else {
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ts.push(
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"data-layout",
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"e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128",
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);
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ts.push("llvm-target", "mips64el-unknown-linux-gnuabi64");
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}
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ts.push("target-pointer-width", "64");
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} else {
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ts.push("arch", "mips");
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cfg.get("TARGET_ISA_REV").map(|isa_rev| {
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let feature = match isa_rev.as_str() {
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"1" => ",+mips32",
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"2" => ",+mips32r2",
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"5" => ",+mips32r5",
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"6" => ",+mips32r6",
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_ => ",+mips2",
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};
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features += feature;
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});
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ts.push("features", features);
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if cfg.has("CPU_BIG_ENDIAN") {
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ts.push("data-layout",
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"E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64");
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ts.push("llvm-target", "mips-unknown-linux-gnu");
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} else {
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ts.push("data-layout",
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"e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64");
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ts.push("llvm-target", "mipsel-unknown-linux-gnu");
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}
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ts.push("target-pointer-width", "32");
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}
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} else {
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panic!("Unsupported architecture");
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}

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