Skip to content

Commit 06e461f

Browse files
committed
fix(g0): USB STM32G0B0xx configuration
Fixes stm32duino#2720. Signed-off-by: Frederic Pillon <[email protected]>
1 parent 9154e6e commit 06e461f

File tree

4 files changed

+31
-10
lines changed

4 files changed

+31
-10
lines changed

libraries/USBDevice/inc/usbd_conf.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -71,7 +71,7 @@ extern "C" {
7171
#define USB_WKUP_IRQHandler USB_FS_WKUP_IRQHandler
7272
#endif
7373
#endif
74-
#elif defined(STM32G0xx)
74+
#elif defined(STM32G0B1xx) || defined(STM32G0C1xx)
7575
#define USB_IRQn USB_UCPD1_2_IRQn
7676
#define USB_IRQHandler USB_UCPD1_2_IRQHandler
7777
#elif defined(STM32C0xx) || defined(STM32H5xx) || defined(STM32U0xx)

variants/STM32G0xx/G0B0CET/generic_clock.c

+10-3
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@ WEAK void SystemClock_Config(void)
2222
{
2323
RCC_OscInitTypeDef RCC_OscInitStruct = {};
2424
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
25+
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
2526

2627
/** Configure the main internal regulator output voltage
2728
*/
@@ -37,9 +38,9 @@ WEAK void SystemClock_Config(void)
3738
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
3839
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
3940
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
40-
RCC_OscInitStruct.PLL.PLLN = 9;
41+
RCC_OscInitStruct.PLL.PLLN = 12;
4142
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
42-
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV3;
43+
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
4344
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3;
4445
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
4546
Error_Handler();
@@ -53,7 +54,13 @@ WEAK void SystemClock_Config(void)
5354
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
5455
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
5556

56-
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
57+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
58+
Error_Handler();
59+
}
60+
61+
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
62+
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
63+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
5764
Error_Handler();
5865
}
5966
}

variants/STM32G0xx/G0B0RET/generic_clock.c

+10-3
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@ WEAK void SystemClock_Config(void)
2222
{
2323
RCC_OscInitTypeDef RCC_OscInitStruct = {};
2424
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
25+
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
2526

2627
/** Configure the main internal regulator output voltage
2728
*/
@@ -37,9 +38,9 @@ WEAK void SystemClock_Config(void)
3738
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
3839
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
3940
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
40-
RCC_OscInitStruct.PLL.PLLN = 9;
41+
RCC_OscInitStruct.PLL.PLLN = 12;
4142
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
42-
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV3;
43+
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
4344
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3;
4445
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
4546
Error_Handler();
@@ -53,7 +54,13 @@ WEAK void SystemClock_Config(void)
5354
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
5455
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
5556

56-
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
57+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
58+
Error_Handler();
59+
}
60+
61+
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
62+
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
63+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
5764
Error_Handler();
5865
}
5966
}

variants/STM32G0xx/G0B0VET/generic_clock.c

+10-3
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@ WEAK void SystemClock_Config(void)
2222
{
2323
RCC_OscInitTypeDef RCC_OscInitStruct = {};
2424
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
25+
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
2526

2627
/** Configure the main internal regulator output voltage
2728
*/
@@ -37,9 +38,9 @@ WEAK void SystemClock_Config(void)
3738
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
3839
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
3940
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
40-
RCC_OscInitStruct.PLL.PLLN = 9;
41+
RCC_OscInitStruct.PLL.PLLN = 12;
4142
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
42-
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV3;
43+
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
4344
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3;
4445
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
4546
Error_Handler();
@@ -53,7 +54,13 @@ WEAK void SystemClock_Config(void)
5354
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
5455
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
5556

56-
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
57+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
58+
Error_Handler();
59+
}
60+
61+
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
62+
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
63+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
5764
Error_Handler();
5865
}
5966
}

0 commit comments

Comments
 (0)