-
Notifications
You must be signed in to change notification settings - Fork 0
Expand file tree
/
Copy pathMakefile
More file actions
79 lines (61 loc) · 2.06 KB
/
Makefile
File metadata and controls
79 lines (61 loc) · 2.06 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
# Makefile for 419 ray tracer project
# Ian Rudnick
# Name of executable file
TARGET := main
# C++ compiler and linker to use
CXX := g++
LD := g++
# Compiler flags and linker flags
CXXFLAGS += -Ofast
CXXFLAGS += -pedantic -Wall -Werror -Wfatal-errors -Wextra -Wno-unused-parameter -Wno-unused-variable -Wno-unused-function -std=c++11
LDFLAGS +=
# Directories we need:
SRC_DIR := src
INC_DIR := include
BUILD_DIR := build
# Add a prefix to the include directory so compiler can find it
INC_FLAGS := $(addprefix -I,$(INC_DIR))
CXXFLAGS += $(INC_FLAGS) -MMD -MP
# Set up commands depending on the operating system
ifeq ($(OS),Windows_NT)
CXXFLAGS += -D WIN32
FIX_PATH = $(subst /,\,$1)
RM_CMD = del /q
MKDIR_CMD = mkdir
else
ifeq ($(shell uname), Linux)
RM_CMD = rm -f
MKDIR_CMD = mkdir -p
FIX_PATH = $1
endif
endif
# Find all the C and C++ files to compile.
SRCS := $(wildcard $(SRC_DIR)/*.cpp) $(wildcard $(SRC_DIR)/*/*.cpp)
INCS := $(wildcard $(INC_DIR)/*.h)
OBJS := $(SRCS:$(SRC_DIR)/%.cpp=$(BUILD_DIR)/%.o)
# Make the list of dependencies from the list of objects.
# Using string substitution (suffix version without %)
DEPENDENCIES := $(OBJECTS:.o=.d)
# Default. We want to make sure the directories are there, then follow the
# instructions to build the executable.
all: $(TARGET)
# Rule to make the main executable
# Prerequisites: must have the objects ready
$(TARGET): $(OBJS)
$(CXX) $(CXXFLAGS) $(OBJS) -o $@ $(LDFLAGS)
# Rule for C++ source
$(OBJS): $(BUILD_DIR)/%.o: $(SRC_DIR)/%.cpp
mkdir -p $(dir $@)
$(CXX) $(CXXFLAGS) -c $< -o $@
# Include the .d Makefiles. The - suppresses the errors of missing Makefiles.
include $(DEPENDENCIES)
.PHONY: all clean info
# Clear the build directory and the compiled executable
clean:
rm -f $(TARGET) $(BUILD_DIR)/*.o $(BUILD_DIR)/*.d $(BUILD_DIR)/*/*.o $(BUILD_DIR)/*/*.d
info:
@echo "[*] Application dir: ${BIN_DIR} "
@echo "[*] Object dir: ${BUILD_DIR} "
@echo "[*] Sources: ${SRCS} "
@echo "[*] Objects: ${OBJS} "
@echo "[*] Dependencies: ${DEPENDENCIES}"