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iabdalkader
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mimxrt/sdio: Add SDIO driver.
This is a basic SDIO driver for the mimxrt port, that was added mainly to support the CYW43 WiFi driver, and as such it only supports the commands required by the CYW43 driver (but more commands can be added easily). The driver performs non-blocking DMA transfers, and can detect and recover from errors. Note: because the mimxrt port is missing static alternate functions, named pins and other pin related functions, currently the alternate functions for USDHC 1 and 2 are hard-coded in the driver. Signed-off-by: iabdalkader <[email protected]>
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‎ports/mimxrt/Makefile

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@@ -216,6 +216,7 @@ SRC_C += \
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pendsv.c \
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pin.c \
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sdcard.c \
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sdio.c \
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systick.c \
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ticks.c \
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tusb_port.c \

‎ports/mimxrt/sdio.c

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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2023 Ibrahim Abdelkader <[email protected]>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdio.h>
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#include "py/mperrno.h"
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#include "py/mphal.h"
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#include "pin.h"
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#include "pendsv.h"
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#include "fsl_usdhc.h"
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#include "fsl_iomuxc.h"
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#if MICROPY_PY_NETWORK_CYW43
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#if MICROPY_HW_SDIO_SDMMC == 1
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#define SDMMC USDHC1
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#define SDMMC_IRQn USDHC1_IRQn
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#define SDMMC_CLOCK_DIV kCLOCK_Usdhc1Div
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#define SDMMC_CLOCK_MUX kCLOCK_Usdhc1Mux
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#ifndef MICROPY_HW_SDIO_CLK_ALT
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#define MICROPY_HW_SDIO_CMD_ALT (0)
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#define MICROPY_HW_SDIO_CLK_ALT (0)
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#define MICROPY_HW_SDIO_D0_ALT (0)
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#define MICROPY_HW_SDIO_D1_ALT (0)
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#define MICROPY_HW_SDIO_D2_ALT (0)
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#define MICROPY_HW_SDIO_D3_ALT (0)
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#endif
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#else
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#define SDMMC USDHC2
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#define SDMMC_IRQn USDHC2_IRQn
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#define SDMMC_CLOCK_DIV kCLOCK_Usdhc2Div
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#define SDMMC_CLOCK_MUX kCLOCK_Usdhc2Mux
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#ifndef MICROPY_HW_SDIO_CLK_ALT
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#define MICROPY_HW_SDIO_CMD_ALT (6)
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#define MICROPY_HW_SDIO_CLK_ALT (6)
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#define MICROPY_HW_SDIO_D0_ALT (6)
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#define MICROPY_HW_SDIO_D1_ALT (6)
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#define MICROPY_HW_SDIO_D2_ALT (6)
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#define MICROPY_HW_SDIO_D3_ALT (6)
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#endif
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#endif
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#define SDMMC_CLOCK_400KHZ (400000U)
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#define SDMMC_CLOCK_25MHZ (25000000U)
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#define SDMMC_CLOCK_50MHZ (50000000U)
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#if SDIO_DEBUG
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#define debug_printf(...) mp_printf(&mp_plat_print, __VA_ARGS__)
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#else
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#define debug_printf(...)
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#endif
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#define DMA_DESCRIPTOR_BUFFER_SIZE (32U)
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AT_NONCACHEABLE_SECTION_ALIGN(
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static uint32_t sdio_adma_descriptor_table[DMA_DESCRIPTOR_BUFFER_SIZE], USDHC_ADMA2_ADDRESS_ALIGN);
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typedef struct _mimxrt_sdmmc_t {
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USDHC_Type *inst;
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usdhc_handle_t handle;
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volatile uint32_t xfer_flags;
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volatile uint32_t xfer_error;
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} mimxrt_sdmmc_t;
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static mimxrt_sdmmc_t sdmmc = {
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.inst = SDMMC,
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};
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typedef enum {
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SDIO_TRANSFER_DATA_COMPLETE = (1 << 0),
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SDIO_TRANSFER_CMD_COMPLETE = (1 << 1),
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SDIO_TRANSFER_ERROR = (1 << 2),
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} sdio_xfer_flags_t;
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static uint32_t sdio_base_clk(void) {
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return CLOCK_GetSysPfdFreq(kCLOCK_Pfd0) / (CLOCK_GetDiv(kCLOCK_Usdhc1Div) + 1U);
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}
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static uint32_t sdio_response_type(uint32_t cmd) {
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switch (cmd) {
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case 3:
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return kCARD_ResponseTypeR6;
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case 5:
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return kCARD_ResponseTypeR4;
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case 7:
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return kCARD_ResponseTypeR1;
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case 52:
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return kCARD_ResponseTypeR5;
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default:
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return kCARD_ResponseTypeNone;
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}
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}
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static void sdio_transfer_callback(USDHC_Type *base,
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usdhc_handle_t *handle, status_t status, void *userData) {
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if (status == kStatus_USDHC_TransferDataComplete) {
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sdmmc.xfer_flags |= SDIO_TRANSFER_DATA_COMPLETE;
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} else if (status == kStatus_USDHC_SendCommandSuccess) {
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sdmmc.xfer_flags |= SDIO_TRANSFER_CMD_COMPLETE;
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} else if (status != kStatus_USDHC_BusyTransferring) {
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sdmmc.xfer_error = status;
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sdmmc.xfer_flags |= SDIO_TRANSFER_ERROR;
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}
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}
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static void sdio_interrupt_callback(USDHC_Type *base, void *userData) {
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extern void (*cyw43_poll)(void);
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USDHC_DisableInterruptSignal(base, kUSDHC_CardInterruptFlag);
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USDHC_ClearInterruptStatusFlags(base, kUSDHC_CardInterruptFlag);
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if (cyw43_poll) {
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pendsv_schedule_dispatch(PENDSV_DISPATCH_CYW43, cyw43_poll);
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}
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}
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void sdio_init(uint32_t irq_pri) {
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machine_pin_config(MICROPY_HW_SDIO_CMD, PIN_MODE_ALT, PIN_PULL_UP_100K, PIN_DRIVE_6, 0, MICROPY_HW_SDIO_CMD_ALT);
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machine_pin_config(MICROPY_HW_SDIO_CLK, PIN_MODE_ALT, PIN_PULL_DISABLED, PIN_DRIVE_6, 0, MICROPY_HW_SDIO_CLK_ALT);
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machine_pin_config(MICROPY_HW_SDIO_D0, PIN_MODE_ALT, PIN_PULL_UP_100K, PIN_DRIVE_6, 0, MICROPY_HW_SDIO_D0_ALT);
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machine_pin_config(MICROPY_HW_SDIO_D1, PIN_MODE_ALT, PIN_PULL_UP_100K, PIN_DRIVE_6, 0, MICROPY_HW_SDIO_D1_ALT);
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machine_pin_config(MICROPY_HW_SDIO_D2, PIN_MODE_ALT, PIN_PULL_UP_100K, PIN_DRIVE_6, 0, MICROPY_HW_SDIO_D2_ALT);
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machine_pin_config(MICROPY_HW_SDIO_D3, PIN_MODE_ALT, PIN_PULL_UP_100K, PIN_DRIVE_6, 0, MICROPY_HW_SDIO_D3_ALT);
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// Configure PFD0 of PLL2 (system PLL) fractional divider to 24 resulting in:
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// with PFD0_clk = PLL2_clk * 18 / N
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// PFD0_clk = 528MHz * 18 / 24 = 396MHz
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CLOCK_InitSysPfd(kCLOCK_Pfd0, 24U);
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CLOCK_SetDiv(SDMMC_CLOCK_DIV, 1U); // USDHC_input_clk = PFD0_clk / 2
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CLOCK_SetMux(SDMMC_CLOCK_MUX, 1U); // Select PFD0 as clock input for USDHC
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// Initialize USDHC
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const usdhc_config_t config = {
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.endianMode = kUSDHC_EndianModeLittle,
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.dataTimeout = 0xFU,
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.readBurstLen = 0,
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.writeBurstLen = 0,
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.readWatermarkLevel = 128U,
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.writeWatermarkLevel = 128U,
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};
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USDHC_Init(sdmmc.inst, &config);
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USDHC_Reset(SDMMC, kUSDHC_ResetAll, 1000U);
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USDHC_DisableInterruptSignal(SDMMC, kUSDHC_AllInterruptFlags);
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USDHC_SetSdClock(sdmmc.inst, sdio_base_clk(), SDMMC_CLOCK_25MHZ);
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USDHC_SetDataBusWidth(sdmmc.inst, kUSDHC_DataBusWidth1Bit);
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mp_hal_delay_ms(10);
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NVIC_SetPriority(SDMMC_IRQn, irq_pri);
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EnableIRQ(SDMMC_IRQn);
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usdhc_transfer_callback_t callbacks = {
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.SdioInterrupt = sdio_interrupt_callback,
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.TransferComplete = sdio_transfer_callback,
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};
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USDHC_TransferCreateHandle(sdmmc.inst, &sdmmc.handle, &callbacks, NULL);
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}
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void sdio_deinit(void) {
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}
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void sdio_reenable(void) {
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}
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void sdio_enable_irq(bool enable) {
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if (enable) {
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USDHC_ClearInterruptStatusFlags(sdmmc.inst, kUSDHC_CardInterruptFlag);
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USDHC_EnableInterruptStatus(sdmmc.inst, kUSDHC_CardInterruptFlag);
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USDHC_EnableInterruptSignal(sdmmc.inst, kUSDHC_CardInterruptFlag);
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} else {
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USDHC_DisableInterruptStatus(sdmmc.inst, kUSDHC_CardInterruptFlag);
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USDHC_ClearInterruptStatusFlags(sdmmc.inst, kUSDHC_CardInterruptFlag);
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USDHC_DisableInterruptSignal(sdmmc.inst, kUSDHC_CardInterruptFlag);
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}
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}
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void sdio_enable_high_speed_4bit(void) {
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USDHC_SetSdClock(sdmmc.inst, sdio_base_clk(), SDMMC_CLOCK_50MHZ);
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USDHC_SetDataBusWidth(sdmmc.inst, kUSDHC_DataBusWidth4Bit);
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}
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static status_t sdio_transfer_dma(USDHC_Type *base,
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usdhc_handle_t *handle, usdhc_transfer_t *transfer, uint32_t timeout_ms) {
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status_t status;
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usdhc_adma_config_t dma_config = {
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.dmaMode = kUSDHC_DmaModeAdma2,
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#if !FSL_FEATURE_USDHC_HAS_NO_RW_BURST_LEN
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.burstLen = kUSDHC_EnBurstLenForINCR,
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#endif
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.admaTable = sdio_adma_descriptor_table,
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.admaTableWords = DMA_DESCRIPTOR_BUFFER_SIZE,
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};
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sdmmc.xfer_flags = 0;
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sdmmc.xfer_error = 0;
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uint32_t xfer_flags = SDIO_TRANSFER_CMD_COMPLETE;
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if (transfer->data != NULL) {
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xfer_flags |= SDIO_TRANSFER_DATA_COMPLETE;
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}
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status = USDHC_TransferNonBlocking(base, handle, &dma_config, transfer);
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if (status != kStatus_Success) {
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debug_printf("sdio_transfer_dma failed to start transfer error: %lu\n", status);
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return status;
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}
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uint32_t start = mp_hal_ticks_ms();
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while ((sdmmc.xfer_flags != xfer_flags) &&
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!(sdmmc.xfer_flags & SDIO_TRANSFER_ERROR) &&
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(mp_hal_ticks_ms() - start) < timeout_ms) {
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MICROPY_EVENT_POLL_HOOK;
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}
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if (sdmmc.xfer_flags == 0) {
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debug_printf("sdio_transfer_dma transfer timeout.\n");
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return kStatus_Timeout;
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} else if (sdmmc.xfer_flags != xfer_flags) {
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debug_printf("sdio_transfer_dma transfer failed: %lu\n", sdmmc.xfer_error);
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USDHC_Reset(base, kUSDHC_ResetCommand, 100);
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if (xfer_flags & SDIO_TRANSFER_DATA_COMPLETE) {
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USDHC_Reset(base, kUSDHC_ResetData, 100);
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}
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return sdmmc.xfer_error;
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}
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return kStatus_Success;
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}
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int sdio_transfer(uint32_t cmd, uint32_t arg, uint32_t *resp) {
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status_t status;
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usdhc_command_t command = {
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.index = cmd,
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.argument = arg,
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.type = kCARD_CommandTypeNormal,
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.responseType = sdio_response_type(cmd),
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.responseErrorFlags = 0
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};
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usdhc_transfer_t transfer = {
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.data = NULL,
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.command = &command,
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};
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status = sdio_transfer_dma(sdmmc.inst, &sdmmc.handle, &transfer, 5000);
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if (status != kStatus_Success) {
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debug_printf("sdio_transfer failed!\n");
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return -MP_EIO;
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}
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if (resp != NULL) {
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*resp = command.response[0];
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}
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return 0;
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}
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int sdio_transfer_cmd53(bool write, uint32_t block_size, uint32_t arg, size_t len, uint8_t *buf) {
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usdhc_data_t data = {
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.enableAutoCommand12 = false,
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.enableAutoCommand23 = false,
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.enableIgnoreError = false,
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.dataType = kUSDHC_TransferDataNormal,
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};
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usdhc_command_t command = {
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.index = 53,
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.argument = arg,
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.type = kCARD_CommandTypeNormal,
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.responseType = kCARD_ResponseTypeR5,
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.responseErrorFlags = 0
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};
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usdhc_transfer_t transfer = {
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.data = &data,
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.command = &command,
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};
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if (write) {
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data.rxData = NULL;
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data.txData = (uint32_t *)buf;
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} else {
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data.txData = NULL;
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data.rxData = (uint32_t *)buf;
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}
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if (arg & (1 << 27)) {
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// SDIO_BLOCK_MODE
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data.blockSize = block_size;
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data.blockCount = len / block_size;
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} else {
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// SDIO_BYTE_MODE
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data.blockSize = block_size;
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data.blockCount = 1;
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}
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debug_printf("cmd53 rw: %d addr 0x%p blocksize %u blockcount %lu total %lu len %d\n",
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write, buf, data.blockSize, data.blockCount, data.blockSize * data.blockCount, len);
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status_t status = sdio_transfer_dma(sdmmc.inst, &sdmmc.handle, &transfer, 5000);
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if (status != kStatus_Success) {
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debug_printf("sdio_transfer_cmd53 failed!\n");
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return -1;
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}
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return 0;
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}
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#endif

‎ports/mimxrt/sdio.h

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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2023 Ibrahim Abdelkader <[email protected]>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
9+
* of this software and associated documentation files (the "Software"), to deal
10+
* in the Software without restriction, including without limitation the rights
11+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12+
* copies of the Software, and to permit persons to whom the Software is
13+
* furnished to do so, subject to the following conditions:
14+
*
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* The above copyright notice and this permission notice shall be included in
16+
* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef MICROPY_INCLUDED_MIMXRT_SDIO_H
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#define MICROPY_INCLUDED_MIMXRT_SDIO_H
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#include <stdbool.h>
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#include <stdint.h>
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void sdio_init(uint32_t irq_pri);
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void sdio_deinit(void);
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void sdio_reenable(void);
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void sdio_enable_irq(bool enable);
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void sdio_enable_high_speed_4bit(void);
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int sdio_transfer(uint32_t cmd, uint32_t arg, uint32_t *resp);
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int sdio_transfer_cmd53(bool write, uint32_t block_size, uint32_t arg, size_t len, uint8_t *buf);
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#endif // MICROPY_INCLUDED_MIMXRT_SDIO_H

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