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iabdalkaderdpgeorge
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stm32/sdram: Make SDRAM refresh count configurable by a board.
Refresh count calculations were using a hard-coded SDRAM frequency and refresh cycles, so change them to values that can be set by a board. And set these options to their existing values on STM32F769DISC and STM32F7DISC boards. Signed-off-by: iabdalkader <[email protected]>
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ports/stm32/boards/STM32F769DISC/mpconfigboard.h

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@@ -141,6 +141,7 @@ extern struct _spi_bdev_t spi_bdev;
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#define MICROPY_HW_SDRAM_BURST_LENGTH 1
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#define MICROPY_HW_SDRAM_CAS_LATENCY 2
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#define MICROPY_HW_SDRAM_FREQUENCY_KHZ (90000) // 90 MHz
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#define MICROPY_HW_SDRAM_COLUMN_BITS_NUM 8
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#define MICROPY_HW_SDRAM_ROW_BITS_NUM 12
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#define MICROPY_HW_SDRAM_MEM_BUS_WIDTH 32
@@ -150,6 +151,7 @@ extern struct _spi_bdev_t spi_bdev;
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#define MICROPY_HW_SDRAM_RBURST (1)
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#define MICROPY_HW_SDRAM_WRITE_PROTECTION (0)
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#define MICROPY_HW_SDRAM_AUTOREFRESH_NUM (8)
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#define MICROPY_HW_SDRAM_REFRESH_CYCLES 8192
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// See pins.csv for CPU pin mapping
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#define MICROPY_HW_FMC_SDCKE0 (pyb_pin_FMC_SDCKE0)

ports/stm32/boards/STM32F7DISC/mpconfigboard.h

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@@ -111,6 +111,7 @@ void STM32F7DISC_board_early_init(void);
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#define MICROPY_HW_SDRAM_BURST_LENGTH 1
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#define MICROPY_HW_SDRAM_CAS_LATENCY 2
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#define MICROPY_HW_SDRAM_FREQUENCY_KHZ (90000) // 90 MHz
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#define MICROPY_HW_SDRAM_COLUMN_BITS_NUM 8
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#define MICROPY_HW_SDRAM_ROW_BITS_NUM 12
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#define MICROPY_HW_SDRAM_MEM_BUS_WIDTH 16
@@ -120,6 +121,7 @@ void STM32F7DISC_board_early_init(void);
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#define MICROPY_HW_SDRAM_RBURST (1)
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#define MICROPY_HW_SDRAM_WRITE_PROTECTION (0)
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#define MICROPY_HW_SDRAM_AUTOREFRESH_NUM (8)
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#define MICROPY_HW_SDRAM_REFRESH_CYCLES 8192
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#define MICROPY_HW_FMC_SDCKE0 (pin_C3)
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#define MICROPY_HW_FMC_SDNE0 (pin_H3)

ports/stm32/sdram.c

+3-3
Original file line numberDiff line numberDiff line change
@@ -245,15 +245,15 @@ static void sdram_init_seq(SDRAM_HandleTypeDef
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/* Send the command */
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HAL_SDRAM_SendCommand(hsdram, command, 0x1000);
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/* Step 8: Set the refresh rate counter
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/* Step 8: Set the refresh rate counter.
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Assuming 90MHz frequency, 8192 refresh cycles and 64ms refresh rate:
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RefreshRate = 64 ms / 8192 cyc = 7.8125 us/cyc
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RefreshCycles = 7.8125 us * 90 MHz = 703
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According to the formula on p.1665 of the reference manual,
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we also need to subtract 20 from the value, so the target
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refresh rate is 703 - 20 = 683.
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*/
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#define REFRESH_COUNT (MICROPY_HW_SDRAM_REFRESH_RATE * 90000 / 8192 - 20)
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#define REFRESH_COUNT (MICROPY_HW_SDRAM_REFRESH_RATE * MICROPY_HW_SDRAM_FREQUENCY_KHZ / MICROPY_HW_SDRAM_REFRESH_CYCLES - 20)
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HAL_SDRAM_ProgramRefreshRate(hsdram, REFRESH_COUNT);
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#if defined(STM32F7) || defined(STM32H7)

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