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MakefileInclude.cnyht
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# Copyright (c) 2015 Convey Computer Corporation
#
# This file is part of the OpenHT toolset located at:
#
# https://github.com/TonyBrewer/OpenHT
#
# Use and distribution licensed under the BSD 3-clause license.
# See the LICENSE file for the complete license text.
HT_VERSION := <VERSION>
default: oht_help
help: oht_help_vars
oht_help:
@echo "Open HT ($(HT_VERSION)) project Makefile help"
@echo ""
@echo "::: Targets :::"
@echo ""
@echo "help Complete help message"
@echo ""
@echo "report Generate design report"
@echo "model Builds functional model application (app_model)"
@echo "sysc Builds SystemC simulation application (app_sysc)"
@echo "vsim Builds Verilog simulation application (app_vsim)"
@echo "app Builds coprocessor application (app)"
@echo "pers Implements coprocessor FPGA bitfile"
@echo "vfiles Generates Verilog files for user modules"
@echo ""
@echo "libmodel Builds model interface library (libhtmodel.a)"
@echo "libsysc Builds sysc interface library (libhtsysc.a)"
@echo "libapp Builds coprocessor interface library (libhtapp.a)"
oht_help_vars: oht_help
@echo ""
@echo "::: Variables ::: (must be exported, i.e. export VAR=)"
@echo ""
@echo "OHT_PLAT Target platform (default convey)"
@$(MAKE) -s plat_help
##############################################################################
HT_LIB = $(HT_DIR)/ht_lib
SC_DIR = $(HT_DIR)/local_systemc
export OHT_PLAT ?= convey
HT_PLAT_DIR = $(HT_LIB)/platform/$(OHT_PLAT)
.PHONY: ht_dir
ht_dir:
@mkdir -p ht
ht/model ht/sysc ht/coregen ht/vsim ht/app: | ht_dir
@mkdir $@
.PHONY: model libmodel
model libmodel: ht/model
@if [ ! -d ./src_model ]; then \
echo "Missing model source directory (./src_model)"; \
else \
$(MAKE) -s -C ht/model -f $(HT_LIB)/model/Makefile TGT=MODEL genfiles; \
$(MAKE) -C ht/model -f $(HT_LIB)/model/Makefile $@; \
fi
.PHONY: sysc libsysc report
sysc libsysc report: ht/sysc
@if [ ! -d ./src_pers ]; then \
echo "Missing personality source directory (./src_pers)"; \
else \
$(MAKE) -s -C ht/sysc -f $(HT_LIB)/sysc/Makefile TGT=SYSC genfiles; \
$(MAKE) -C ht/sysc -f $(HT_LIB)/sysc/Makefile TGT=SYSC genhfiles; \
if [ "$@" != "report" ]; then \
$(MAKE) -C ht/sysc -f $(HT_LIB)/sysc/Makefile $@; \
fi; \
fi
vfiles: VTGT=VERILOG
VTGT ?= VSIM
.PHONY: vsim libvsim vfiles
vsim libvsim vfiles: ht/coregen ht/vsim
@if [ ! -d ./src_pers ]; then \
echo "Missing personality source directory (./src_pers)"; \
else \
$(MAKE) -s -C ht/vsim -f $(HT_LIB)/vsim/Makefile TGT=$(VTGT) genfiles; \
$(MAKE) -C ht/vsim -f $(HT_LIB)/vsim/Makefile TGT=$(VTGT) genhfiles; \
$(MAKE) -C ht/vsim -f $(HT_LIB)/vsim/Makefile TGT=$(VTGT) $@; \
$(MAKE) -s TGT=$(VTGT) plat_vsim; \
fi
.PHONY: app libapp
app libapp: ht/app
$(MAKE) -s -C ht/app -f $(HT_LIB)/app/Makefile TGT=APP genfiles
$(MAKE) -C ht/app -f $(HT_LIB)/app/Makefile $@
.PHONY: pers
pers: plat_pers
clean:
@rm -rf ht/model ht/sysc ht/vsim ht/verilog ht/app
@rm -f ht/Ht*.* Ht*.* InstrTrace.txt
@rm -f app_model libhtmodel.*
@rm -f app_sysc libhtsysc.*
@rm -f app_vsim libhtvsim.* app_vsim.*
@rm -f app libhtapp.*
ifneq ($(LOCALCLEAN),)
@rm -rf $(LOCALCLEAN)
endif
@$(MAKE) plat_clean
cleaner:
@$(MAKE) -s clean
@$(MAKE) -s plat_cleaner
distclean:
@$(MAKE) -s cleaner
@$(MAKE) -s plat_distclean
@rm -rf ht wave.vcd
-include $(HT_LIB)/platform/$(OHT_PLAT)/MakefileInclude.plat