perf/x86/intel: Ensure LBRs are disabled when a CPU is starting

JIRA: https://issues.redhat.com/browse/RHEL-95318

commit c631a2d
Author: Sean Christopherson <[email protected]>
Date:   Thu Jan 30 17:07:21 2025 -0800

    perf/x86/intel: Ensure LBRs are disabled when a CPU is starting

    Explicitly clear DEBUGCTL.LBR when a CPU is starting, prior to purging the
    LBR MSRs themselves, as at least one system has been found to transfer
    control to the kernel with LBRs enabled (it's unclear whether it's a BIOS
    flaw or a CPU goof).  Because the kernel preserves the original DEBUGCTL,
    even when toggling LBRs, leaving DEBUGCTL.LBR as is results in running
    with LBRs enabled at all times.

    Closes: https://lore.kernel.org/all/[email protected]
    Reported-by: Maxim Levitsky <[email protected]>
    Signed-off-by: Sean Christopherson <[email protected]>
    Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
    Reviewed-by: Maxim Levitsky <[email protected]>
    Cc: [email protected]
    Link: https://lkml.kernel.org/r/[email protected]

Signed-off-by: Maxim Levitsky <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>

Author: Maxim Levitsky

arch/x86/events/intel/core.c

@@ -5069,8 +5069,11 @@ static void intel_pmu_cpu_starting(int cpu)
 
 	init_debug_store_on_cpu(cpu);
 	/*
-	 * Deal with CPUs that don't clear their LBRs on power-up.
+	 * Deal with CPUs that don't clear their LBRs on power-up, and that may
+	 * even boot with LBRs enabled.
 	 */
+	if (!static_cpu_has(X86_FEATURE_ARCH_LBR) && x86_pmu.lbr_nr)
+		msr_clear_bit(MSR_IA32_DEBUGCTLMSR, DEBUGCTLMSR_LBR_BIT);
 	intel_pmu_lbr_reset();
 
 	cpuc->lbr_sel = NULL;

arch/x86/include/asm/msr-index.h

@@ -372,7 +372,8 @@
 #define MSR_IA32_PASID_VALID		BIT_ULL(31)
 
 /* DEBUGCTLMSR bits (others vary by model): */
-#define DEBUGCTLMSR_LBR			(1UL <<  0) /* last branch recording */
+#define DEBUGCTLMSR_LBR_BIT		0	     /* last branch recording */
+#define DEBUGCTLMSR_LBR			(1UL <<  DEBUGCTLMSR_LBR_BIT)
 #define DEBUGCTLMSR_BTF_SHIFT		1
 #define DEBUGCTLMSR_BTF			(1UL <<  1) /* single-step on branches */
 #define DEBUGCTLMSR_BUS_LOCK_DETECT	(1UL <<  2)