drm/amd/display: clear optc underflow before turn off odm clock

jira VULN-69264
cve CVE-2022-49969
commit-author Fudong Wang <[email protected]>
commit b2a9349

[Why]
After ODM clock off, optc underflow bit will be kept there always and clear not work.
We need to clear that before clock off.

[How]
Clear that if have when clock off.

	Reviewed-by: Alvin Lee <[email protected]>
	Acked-by: Tom Chung <[email protected]>
	Signed-off-by: Fudong Wang <[email protected]>
	Tested-by: Daniel Wheeler <[email protected]>
	Signed-off-by: Alex Deucher <[email protected]>
(cherry picked from commit b2a9349)
	Signed-off-by: Jonathan Maple <[email protected]>

Author: PlaidCat

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c

@@ -464,6 +464,11 @@ void optc1_enable_optc_clock(struct timing_generator *optc, bool enable)
 				OTG_CLOCK_ON, 1,
 				1, 1000);
 	} else  {
+
+		//last chance to clear underflow, otherwise, it will always there due to clock is off.
+		if (optc->funcs->is_optc_underflow_occurred(optc) == true)
+			optc->funcs->clear_optc_underflow(optc);
+
 		REG_UPDATE_2(OTG_CLOCK_CONTROL,
 				OTG_CLOCK_GATE_DIS, 0,
 				OTG_CLOCK_EN, 0);