How can a subclass module add a new io to the original io of the parent class module?(请问子类module如何在父类module原有的io基础上增加新的io？)

[ddxoxpp]

As the title.
(如题。)

[sequencer]

TL;DR
There are three methods:

1. Aspect API
2. InModuleBody API from diplomacy
3. registerFinishAction API(unmerged yet)

when involving chisel internal implementations, for a life cycle of a Module, there are three periods:

1. Before Module instantiated:
   you are free to register any code blocks to a list buffer, and instantiate it later when Module is instantiating.
2. When Module is instantiating, there are two different cases:

• inside this module, Module.currentModule is this module: you can add any IO or something else to your Module, like what we usually does.
• outside of this module, generally this is a case, when Module stack goes into another module, in this case, you are not allowed to add code blocks to the this module, Diplomacy resolves this via lazy implementation via this code block, if Implement User API registerFinishAction #1943 merged, you can use that API to resolve this as well.

3. After Module instantiated,
   you are forbid to add any IR to this module, thus you can only use Aspect API to match the module and add code block later(the API is fairly complicated, @azidar may help)

So let's go back to your question:

How can a subclass module add a new io to the original io of the parent class module?

If you are not willing to use diplomacy currently, the simplest API might be 3, but not merged yet. We can discuss this question in today's dev-meeting.

[edwardcwang]

Because the traditional Chisel I/O style is

class Parent extends Module {
  val io = IO(new Bundle {
    val foo = Input(Bool())
    val bar = Output(UInt(10.W))
  }
  // ...
}
}

[ekiwi]

Yeah, this is a situation where the best answer may be to just use two separate I/Os instead of a single io bundle.

[sequencer]

My bad, I misunderstood the original question, I thought it was modifying the outer module from inner module.

[ddxoxpp]

I am sorry for not clarifying the situation:

class Parent extends BoomModule {
  val io = IO(new Bundle {
    ...
  }
 class Child extends Parent {
  val add_io = IO(new Bundle {
    ...
  }

And then make failed.

[jackkoenig]

What is the error?

[mwachs5]

what is a BoomModule? In order for what you are doing to work, it needs to be a chisel3.MultiIOModule or a chisel3.Module (3.5 only) not a chisel3.Module (3.4.x or earlier) or a Chisel.Module.

[ddxoxpp]

BoomModule is used in chipyard/generators/boom, it seems to be a MultiIOModule