From f66450dca02fa022c8bc4709e2902bb5a86f45b4 Mon Sep 17 00:00:00 2001 From: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com> Date: Sat, 6 Sep 2025 12:54:45 +0300 Subject: [PATCH 1/6] Update Makefile --- Makefile | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/Makefile b/Makefile index 2f4f5b3..b1914e1 100644 --- a/Makefile +++ b/Makefile @@ -35,6 +35,7 @@ export PDKPATH?=$(PDK_ROOT)/$(PDK) PYTHON_BIN ?= python3 ROOTLESS ?= 0 +export CIEL_DATA_SOURCE=static-web:https://chipfoundry.github.io/ciel-releases USER_ARGS = -u $$(id -u $$USER):$$(id -g $$USER) ifeq ($(ROOTLESS), 1) USER_ARGS = @@ -46,9 +47,7 @@ export DISABLE_LVS?=0 export ROOTLESS ifeq ($(PDK),sky130A) -SKYWATER_COMMIT=f70d8ca46961ff92719d8870a18a076370b85f6c -export OPEN_PDKS_COMMIT_LVS?=6d4d11780c40b20ee63cc98e645307a9bf2b2ab8 -export OPEN_PDKS_COMMIT?=0fe599b2afb6708d281543108caf8310912f54af +export OPEN_PDKS_COMMIT?=3e0e31dcce8519a7dbb82590346db16d91b7244f MPW_TAG ?= CC2509 ifeq ($(CARAVEL_LITE),1) CARAVEL_NAME := caravel-lite @@ -62,9 +61,7 @@ endif endif ifeq ($(PDK),sky130B) -SKYWATER_COMMIT=f70d8ca46961ff92719d8870a18a076370b85f6c -export OPEN_PDKS_COMMIT_LVS?=6d4d11780c40b20ee63cc98e645307a9bf2b2ab8 -export OPEN_PDKS_COMMIT?=0fe599b2afb6708d281543108caf8310912f54af +export OPEN_PDKS_COMMIT?=3e0e31dcce8519a7dbb82590346db16d91b7244f MPW_TAG ?= 2024.09.12-1 ifeq ($(CARAVEL_LITE),1) CARAVEL_NAME := caravel-lite From 428c31e8a55ac1e921d6d4974dc34bbbd97cf205 Mon Sep 17 00:00:00 2001 From: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com> Date: Sat, 6 Sep 2025 12:55:15 +0300 Subject: [PATCH 2/6] Update Makefile --- openlane/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openlane/Makefile b/openlane/Makefile index 3560ece..9a8dd35 100644 --- a/openlane/Makefile +++ b/openlane/Makefile @@ -27,7 +27,7 @@ ifeq ($(origin LIBRELANE_RUN_TAG), undefined) export LIBRELANE_RUN_TAG := $(shell date '+%y_%m_%d_%H_%M') endif ifeq ($(origin LIBRELANE_TAG), undefined) -export CF_LIBRELANE_TAG := CC2509 +export CF_LIBRELANE_TAG := CC2509c endif export CARAVEL_ROOT := $(CARAVEL_ROOT) From d74011cf2e498936f14dc1e2f2e1a55589a08924 Mon Sep 17 00:00:00 2001 From: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com> Date: Sat, 6 Sep 2025 13:07:49 +0300 Subject: [PATCH 3/6] Update Makefile --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index b1914e1..fff7d65 100644 --- a/Makefile +++ b/Makefile @@ -221,7 +221,7 @@ precheck: @docker pull chipfoundry/mpw_precheck:latest .PHONY: run-precheck -run-precheck: check-pdk check-precheck enable-lvs-pdk +run-precheck: check-pdk check-precheck @if [ "$$DISABLE_LVS" = "1" ]; then\ $(eval INPUT_DIRECTORY := $(shell pwd)) \ cd $(PRECHECK_ROOT) && \ From d3e02479671178f06d072b7977e687e1ac07a88a Mon Sep 17 00:00:00 2001 From: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com> Date: Sat, 6 Sep 2025 13:18:47 +0300 Subject: [PATCH 4/6] Update lvs_config.json --- lvs/user_project_wrapper/lvs_config.json | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lvs/user_project_wrapper/lvs_config.json b/lvs/user_project_wrapper/lvs_config.json index 459d73c..f5a0b71 100644 --- a/lvs/user_project_wrapper/lvs_config.json +++ b/lvs/user_project_wrapper/lvs_config.json @@ -8,7 +8,7 @@ "*__fill_*", "*__fakediode_*", "*__tapvpwrvgnd_*", - "CF_SRAM_1024x32" + "*CF_SRAM_1024x32" ], "LVS_FLATTEN": [ "" @@ -28,4 +28,4 @@ "$UPRJ_ROOT/verilog/gl/$TOP_SOURCE.v" ], "LAYOUT_FILE": "$UPRJ_ROOT/gds/$TOP_LAYOUT.gds" -} \ No newline at end of file +} From 1c514e349694d08b41f5de1697a2129fb14c5e7a Mon Sep 17 00:00:00 2001 From: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com> Date: Sat, 6 Sep 2025 13:19:02 +0300 Subject: [PATCH 5/6] Update lvs_config.json --- lvs/user_project_wrapper/lvs_config.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lvs/user_project_wrapper/lvs_config.json b/lvs/user_project_wrapper/lvs_config.json index f5a0b71..6e6adb0 100644 --- a/lvs/user_project_wrapper/lvs_config.json +++ b/lvs/user_project_wrapper/lvs_config.json @@ -20,7 +20,7 @@ "" ], "LVS_SPICE_FILES": [ - "$PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_ef_sc_hd__decap_12.spice", + "$PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_ef_sc_hd__decap*.spice", "$PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice" ], "LVS_VERILOG_FILES": [ From 2b2992f789c78a179966ceb42ff68d36f376235e Mon Sep 17 00:00:00 2001 From: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com> Date: Sat, 6 Sep 2025 13:26:20 +0300 Subject: [PATCH 6/6] Update dependencies.json --- ip/dependencies.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ip/dependencies.json b/ip/dependencies.json index 9f0c215..ee313c5 100644 --- a/ip/dependencies.json +++ b/ip/dependencies.json @@ -1 +1 @@ -{"IP": [{"CF_SRAM_1024x32": "v1.1.0"}]} \ No newline at end of file +{"IP": [{"CF_SRAM_1024x32": "v1.2.1"}]}