perf-uncore-events-hsw.csv

UNC_C_CLOCKTICKS,,Uncore cache clock ticks,,,
UNC_C_LLC_LOOKUP.ANY,,All LLC Misses (code+ data rd + data wr - including demand and prefetch),:state=0x1,64,
UNC_C_LLC_VICTIMS.M_STATE,,M line evictions from LLC (writebacks to memory),,64,
 UNC_C_TOR_INSERTS.MISS_OPCODE,,,,,,
UNC_C_TOR_INSERTS.MISS_OPCODE,LLC_MISSES.DATA_READ,LLC misses - demand and prefetch data reads - excludes LLC prefetches,:opc=0x182,64,
UNC_C_TOR_INSERTS.MISS_OPCODE,LLC_MISSES.UNCACHEABLE,LLC misses - Uncacheable reads (from cpu) ,:opc=0x187,,
UNC_C_TOR_INSERTS.MISS_OPCODE,LLC_MISSES.MMIO_READ,MMIO reads,:opc=0x187:nc=1,,
UNC_C_TOR_INSERTS.MISS_OPCODE,LLC_MISSES.MMIO_WRITE,MMIO writes,:opc=0x18f:nc=1,,
UNC_C_TOR_INSERTS.MISS_OPCODE,LLC_MISSES.RFO_LLC_PREFETCH,LLC prefetch misses for RFO,:opc=0x190,64,
UNC_C_TOR_INSERTS.MISS_OPCODE,LLC_MISSES.CODE_LLC_PREFETCH,LLC prefetch misses for code reads,:opc=0x191,64,
UNC_C_TOR_INSERTS.MISS_OPCODE,LLC_MISSES.DATA_LLC_PREFETCH,LLC prefetch misses for data reads,:opc=0x192,64,
UNC_C_TOR_INSERTS.MISS_OPCODE,LLC_MISSES.PCIE_READ,LLC misses for PCIe read current,:opc=0x19e,,
UNC_C_TOR_INSERTS.MISS_OPCODE,LLC_MISSES.PCIE_WRITE,ItoM write misses (as part of fast string memcpy stores) + PCIe full line writes,:opc=0x1c8,64,
UNC_C_TOR_INSERTS.MISS_OPCODE,LLC_MISSES.PCIE_NON_SNOOP_WRITE,PCIe write misses (full cache line),:opc=0x1c8:tid=0x3e,64,
UNC_C_TOR_INSERTS.OPCODE,,,,,,
UNC_C_TOR_INSERTS.OPCODE,LLC_REFERENCES.PCIE_NS_PARTIAL_WRITE,PCIe writes (partial cache line),:opc=0x180:tid=0x3e,,
UNC_C_TOR_INSERTS.OPCODE,LLC_REFERENCES.CODE_LLC_PREFETCH,L2 demand and L2 prefetch code references to LLC,:opc=0x181,64,
UNC_C_TOR_INSERTS.OPCODE,LLC_REFERENCES.STREAMING_FULL,Streaming stores (full cache line),:opc=0x18c,64,
UNC_C_TOR_INSERTS.OPCODE,LLC_REFERENCES.STREAMING_PARTIAL,Streaming stores (partial cache line),:opc=0x18d,,
UNC_C_TOR_INSERTS.OPCODE,LLC_REFERENCES.PCIE_READ,PCIe read current,:opc=0x19e,,
UNC_C_TOR_INSERTS.OPCODE,LLC_REFERENCES.PCIE_WRITE,PCIe write references (full cache line),:opc=0x1c8:tid=0x3e,64,
UNC_C_TOR_OCCUPANCY.MISS_OPCODE,UNC_C_TOR_OCCUPANCY.LLC_DATA_READ,Occupancy counter for LLC data reads (demand and L2 prefetch),:opc=0x182,,
UNC_H_REQUESTS.READS,,read requests to home agent,,,
UNC_H_REQUESTS.READS_LOCAL,,read requests to local home agent,,,
UNC_H_REQUESTS.READS_REMOTE,,read requests to remote home agent,,,
UNC_H_REQUESTS.WRITES,,write requests to home agent,,,
UNC_H_REQUESTS.WRITES_LOCAL,,write requests to local home agent,,,
UNC_H_REQUESTS.WRITES_REMOTE,,write requests to remote home agent,,,
UNC_H_SNOOP_RESP.RSPCNFLCT,,Conflict requests (requests for same address from multiple agents simultaneously),,,
UNC_H_SNOOP_RESP.RSP_FWD_WB,,M line forwarded from remote cache along with writeback to memory,,64,
UNC_H_SNOOP_RESP.RSPIFWD,,M line forwarded from remote cache with no writeback to memory,,64,
UNC_H_SNOOP_RESP.RSPS,,Shared line response from remote cache,,64,
UNC_H_SNOOP_RESP.RSPSFWD,,Shared line forwarded from remote cache,,64,
UNC_M_CAS_COUNT.RD,,,,,,
UNC_M_CAS_COUNT.RD,LLC_MISSES.MEM_READ,read requests to memory controller,,64,
UNC_M_CAS_COUNT.WR,,,,,,
UNC_M_CAS_COUNT.WR,LLC_MISSES.MEM_WRITE,write requests to memory controller,,64,
UNC_M_CLOCKTICKS,,Memory controller clock ticks,,,
UNC_M_POWER_CHANNEL_PPD,,Cycles where DRAM ranks are in power down (CKE) mode,,,X/UNC_M_CLOCKTICKS
UNC_M_POWER_CRITICAL_THROTTLE_CYCLES,,Cycles all ranks are in critical thermal throttle,,,X/UNC_M_CLOCKTICKS
UNC_M_POWER_SELF_REFRESH,,Cycles Memory is in self refresh power mode,,,X/UNC_M_CLOCKTICKS
UNC_M_PRE_COUNT.PAGE_MISS,,Pre-charges due to page misses,,,
UNC_M_PRE_COUNT.RD,,Pre-charge for reads,,,
UNC_M_PRE_COUNT.WR,,Pre-charge for writes,,,
UNC_Q_CLOCKTICKS,,QPI clock ticks,,,
UNC_Q_TxL_FLITS_G0.DATA,,,,,,
UNC_Q_TxL_FLITS_G0.DATA,QPI_DATA_BANDWIDTH_TX,Number of data flits transmitted ,,8,
UNC_Q_TxL_FLITS_G0.NON_DATA,,,,,,
UNC_Q_TxL_FLITS_G0.NON_DATA,QPI_CTL_BANDWIDTH_TX,Number of non data (control) flits transmitted ,,8,
UNC_P_CLOCKTICKS,,PCU clock ticks. Use to get percentages of PCU cycles events.,,,
UNC_P_POWER_STATE_OCCUPANCY.CORES_C0,,"This is an occupancy event that tracks the number of cores that are in C0.  It can be used by itself to get the average number of cores in C0, with threshholding to generate histograms, or with other PCU events and occupancy triggering to capture other details.",occ_sel=1,,X/UNC_P_CLOCKTICKS
UNC_P_POWER_STATE_OCCUPANCY.CORES_C3,,"This is an occupancy event that tracks the number of cores that are in C3.  It can be used by itself to get the average number of cores in C0, with threshholding to generate histograms, or with other PCU events and occupancy triggering to capture other details.",occ_sel=2,,X/UNC_P_CLOCKTICKS
UNC_P_POWER_STATE_OCCUPANCY.CORES_C6,,"This is an occupancy event that tracks the number of cores that are in C6.  It can be used by itself to get the average number of cores in C0, with threshholding to generate histograms, or with other PCU events ",occ_sel=3,,X/UNC_P_CLOCKTICKS
UNC_P_PROCHOT_EXTERNAL_CYCLES,,Counts the number of cycles that we are in external PROCHOT mode.  This mode is triggered when a sensor off the die determines that something off-die (like DRAM) is too hot and must throttle to avoid damaging the chip.,,,X/UNC_P_CLOCKTICKS
UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES,,Counts the number of cycles when temperature is the upper limit on frequency.,,,X/UNC_P_CLOCKTICKS
UNC_P_FREQ_MAX_OS_CYCLES,,Counts the number of cycles when the OS is the upper limit on frequency.,,,X/UNC_P_CLOCKTICKS
UNC_P_FREQ_MAX_POWER_CYCLES,,Counts the number of cycles when power is the upper limit on frequency.,,,X/UNC_P_CLOCKTICKS
UNC_P_FREQ_TRANS_CYCLES,,Counts the number of cycles when current is the upper limit on frequency.,,,X/UNC_P_CLOCKTICKS