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| 1 | +AD7124-4SDZ no-OS Example Project |
| 2 | +================================= |
| 3 | + |
| 4 | +.. contents:: |
| 5 | + :depth: 3 |
| 6 | + |
| 7 | +Supported Evaluation Boards |
| 8 | +--------------------------- |
| 9 | + |
| 10 | +- :adi:`EVAL-AD7124-4SDZ` |
| 11 | + |
| 12 | +Overview |
| 13 | +-------- |
| 14 | + |
| 15 | +The EVAL-AD7124-4SDZ evaluation board is a platform for testing the |
| 16 | +AD7124-4, a 4-channel, 24-bit sigma-delta ADC. It features low noise, |
| 17 | +low power consumption, and includes an internal instrumentation |
| 18 | +amplifier and reference. The board supports diverse input |
| 19 | +configurations, suitable for high-precision measurements, and connects |
| 20 | +to PCs via the Analog Devices System Demonstration Platform |
| 21 | +(EVAL-SDP-CB1Z) for standalone data analysis. It requires a 7V to 9V |
| 22 | +power supply and offers connectors for power and signals, allowing users |
| 23 | +to connect sensors and conduct ADC diagnostics. |
| 24 | + |
| 25 | +Applications |
| 26 | +------------ |
| 27 | + |
| 28 | +- Temperature Measurement |
| 29 | +- Pressure Measurement |
| 30 | +- Industrial Process Control |
| 31 | +- Instrumentation |
| 32 | +- Smart Transmitters |
| 33 | + |
| 34 | +Hardware Specifications |
| 35 | +----------------------- |
| 36 | + |
| 37 | +Power Supply Requirements |
| 38 | +~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 39 | + |
| 40 | +The EVAL-AD7124-4SDZ evaluation board requires an external power supply |
| 41 | +ranging from 7V to 9V. Power can be supplied via the J3 connector |
| 42 | +using a bench top supply or the J5 connector with a DC plug adapter. |
| 43 | + |
| 44 | +On-board Connectors |
| 45 | +~~~~~~~~~~~~~~~~~~~ |
| 46 | + |
| 47 | ++-----------------------+-----------------------+-----------------------+ |
| 48 | +| **Connector** | **Type / Location** | **Function** | |
| 49 | ++-----------------------+-----------------------+-----------------------+ |
| 50 | +| J3 | Barrel jack (bench | 7V–9V input; selected | |
| 51 | +| | top supply) | via LK2 jumper | |
| 52 | +| | | (Position A) | |
| 53 | ++-----------------------+-----------------------+-----------------------+ |
| 54 | +| J5 | Barrel jack (wall | 7V–9V input; selected | |
| 55 | +| | wart supply) | via LK2 jumper | |
| 56 | +| | | (Position B) | |
| 57 | ++-----------------------+-----------------------+-----------------------+ |
| 58 | +| J6 | Analog input header | Connect analog | |
| 59 | +| | | sensors/signals | |
| 60 | ++-----------------------+-----------------------+-----------------------+ |
| 61 | +| J11 | Analog input header | Additional analog | |
| 62 | +| | | input options | |
| 63 | ++-----------------------+-----------------------+-----------------------+ |
| 64 | +| A0 / A1 | SMA/SMB footprints | Differential analog | |
| 65 | +| | | input channels | |
| 66 | ++-----------------------+-----------------------+-----------------------+ |
| 67 | +| CLK IN | SMB/SMA jack (not | Optional external | |
| 68 | +| | inserted by default) | master clock input | |
| 69 | ++-----------------------+-----------------------+-----------------------+ |
| 70 | +| Test Points | SPI signal access | CS, SCLK, DIN, | |
| 71 | +| | | DOUT/RDY — accessible | |
| 72 | +| | | by removing R9–R13 0Ω | |
| 73 | +| | | links | |
| 74 | ++-----------------------+-----------------------+-----------------------+ |
| 75 | + |
| 76 | +No-OS Build Setup |
| 77 | +----------------- |
| 78 | + |
| 79 | +Please see: `https://wiki.analog.com/resources/no-os/build` |
| 80 | + |
| 81 | +No-OS Supported Examples |
| 82 | +------------------------ |
| 83 | + |
| 84 | +The initialization data used in the examples is taken out from the |
| 85 | +`Project Source Path <https://github.com/analogdevicesinc/no-OS/tree/main/projects/ad7124-4sdz/src>`__. |
| 86 | + |
| 87 | +Application example |
| 88 | +~~~~~~~~~~~~~~~~~~~ |
| 89 | + |
| 90 | +In the example code for the AD7124-4SDZ no-OS project, the |
| 91 | +operation begins with initializing the SPI interface specific to the |
| 92 | +Xilinx platform. The AD7124 ADC device is then configured using the |
| 93 | +``ad7124_setup()`` function, which prepares the ADC by writing the |
| 94 | +necessary settings to its registers. The program proceeds by reading |
| 95 | +each register to confirm these settings. Entering an operational loop, |
| 96 | +the code waits for ADC conversions to become available with |
| 97 | +``ad7124_wait_for_conv_ready()`` and reads the conversion result via |
| 98 | +``ad7124_read_data()``. The obtained raw ADC data is continuously |
| 99 | +printed to the console, demonstrating the integration process of the |
| 100 | +AD7124 ADC within a no-OS environment. |
| 101 | + |
| 102 | +No-OS Supported Platforms |
| 103 | +------------------------- |
| 104 | + |
| 105 | +Xilinx |
| 106 | +~~~~~~~ |
| 107 | + |
| 108 | +Hardware Used |
| 109 | +^^^^^^^^^^^^^ |
| 110 | + |
| 111 | +- :adi:`EVAL-AD7124-4SDZ` |
| 112 | +- ZedBoard |
| 113 | + |
| 114 | +Connections |
| 115 | +^^^^^^^^^^^ |
| 116 | + |
| 117 | ++-----------------------+-----------------------+-----------------------+ |
| 118 | +| **EVAL-AD7124-4SDZ | **ZedBoard Pin** | **Function / Notes** | |
| 119 | +| Pin** | | | |
| 120 | ++-----------------------+-----------------------+-----------------------+ |
| 121 | +| CS | SPI_CS | Chip Select | |
| 122 | ++-----------------------+-----------------------+-----------------------+ |
| 123 | +| SCLK | SPI_CLK | Serial Clock | |
| 124 | ++-----------------------+-----------------------+-----------------------+ |
| 125 | +| DIN | SPI_MOSI | Data In (Master Out | |
| 126 | +| | | Slave In) | |
| 127 | ++-----------------------+-----------------------+-----------------------+ |
| 128 | +| DOUT/RDY | SPI_MISO | Data Out / Data Ready | |
| 129 | +| | | (Master In Slave Out) | |
| 130 | ++-----------------------+-----------------------+-----------------------+ |
| 131 | +| R9 to R13 | — | Remove 0Ω links to | |
| 132 | +| | | access SPI test | |
| 133 | +| | | points directly | |
| 134 | ++-----------------------+-----------------------+-----------------------+ |
| 135 | +| Test Points | ZedBoard Expansion | Wire SPI signals to | |
| 136 | +| | | Pmod or FMC header | |
| 137 | +| | | pins | |
| 138 | ++-----------------------+-----------------------+-----------------------+ |
| 139 | + |
| 140 | +Consult the ZedBoard User Guide for Pmod or FMC header pinouts. The |
| 141 | +ZedBoard provides several Pmod (2x6) headers and an FMC-LPC connector |
| 142 | +suitable for digital I/O. |
| 143 | + |
| 144 | +Double-check that all grounds are connected and consistent between the |
| 145 | +two boards. |
| 146 | + |
| 147 | +Verify the logic voltage levels are compatible. The AD7124-4 supports |
| 148 | +digital I/O supply (IOVDD) between 1.65V and 3.6V. |
| 149 | + |
| 150 | +Build Command |
| 151 | +^^^^^^^^^^^^^ |
| 152 | + |
| 153 | +.. code-block:: bash |
| 154 | +
|
| 155 | + cp <SOME_PATH>/system_top.xsa . |
| 156 | + # to delete current build |
| 157 | + make reset |
| 158 | + # to build the project |
| 159 | + make |
| 160 | + # to flash the code |
| 161 | + make run |
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