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projects: ad7124-4sdz: Added readme document
Signed-off-by: Joyce Velasco <[email protected]>
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‎doc/sphinx/source/projects/adc/ad7124-4sdz.rst‎

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.. include:: ../../../../../projects/ad7124-4sdz/README.rst

‎projects/ad7124-4sdz/README.rst‎

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AD7124-4SDZ no-OS Example Project
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=================================
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.. contents::
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:depth: 3
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Supported Evaluation Boards
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---------------------------
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- :adi:`EVAL-AD7124-4SDZ`
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Overview
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--------
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The EVAL-AD7124-4SDZ evaluation board is a platform for testing the
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AD7124-4, a 4-channel, 24-bit sigma-delta ADC. It features low noise,
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low power consumption, and includes an internal instrumentation
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amplifier and reference. The board supports diverse input
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configurations, suitable for high-precision measurements, and connects
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to PCs via the Analog Devices System Demonstration Platform
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(EVAL-SDP-CB1Z) for standalone data analysis. It requires a 7V to 9V
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power supply and offers connectors for power and signals, allowing users
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to connect sensors and conduct ADC diagnostics.
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Applications
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------------
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- Temperature Measurement
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- Pressure Measurement
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- Industrial Process Control
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- Instrumentation
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- Smart Transmitters
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Hardware Specifications
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-----------------------
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Power Supply Requirements
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~~~~~~~~~~~~~~~~~~~~~~~~~~
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The EVAL-AD7124-4SDZ evaluation board requires an external power supply
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ranging from 7V to 9V. Power can be supplied via the J3 connector
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using a bench top supply or the J5 connector with a DC plug adapter.
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On-board Connectors
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~~~~~~~~~~~~~~~~~~~
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+-----------------------+-----------------------+-----------------------+
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| **Connector** | **Type / Location** | **Function** |
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+-----------------------+-----------------------+-----------------------+
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| 120-pin Header | Main board connector | Mates with |
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| | | EVAL-SDP-CB1Z for SPI |
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| | | communication and |
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| | | power |
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+-----------------------+-----------------------+-----------------------+
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| J3 | Barrel jack (bench | 7V–9V input; selected |
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| | top supply) | via LK2 jumper |
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| | | (Position A) |
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+-----------------------+-----------------------+-----------------------+
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| J5 | Barrel jack (wall | 7V–9V input; selected |
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| | wart supply) | via LK2 jumper |
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| | | (Position B) |
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+-----------------------+-----------------------+-----------------------+
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| J6 | Analog input header | Connect analog |
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| | | sensors/signals |
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+-----------------------+-----------------------+-----------------------+
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| J11 | Analog input header | Additional analog |
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| | | input options |
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+-----------------------+-----------------------+-----------------------+
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| A0 / A1 | SMA/SMB footprints | Differential analog |
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| | | input channels |
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+-----------------------+-----------------------+-----------------------+
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| CLK IN | SMB/SMA jack (not | Optional external |
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| | inserted by default) | master clock input |
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+-----------------------+-----------------------+-----------------------+
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| Test Points | SPI signal access | CS, SCLK, DIN, |
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| | | DOUT/RDY — accessible |
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| | | by removing R9–R13 0Ω |
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| | | links |
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+-----------------------+-----------------------+-----------------------+
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No-OS Build Setup
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-----------------
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Please see: `https://wiki.analog.com/resources/no-os/build`
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No-OS Supported Examples
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------------------------
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The initialization data used in the examples is taken out from the
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`Project Source Path <https://github.com/analogdevicesinc/no-OS/tree/main/projects/ad7124-4sdz/src>`__.
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Application example
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~~~~~~~~~~~~~~~~~~~
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In the example code for the AD7124-4SDZ no-OS project, the
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operation begins with initializing the SPI interface specific to the
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Xilinx platform. The AD7124 ADC device is then configured using the
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``ad7124_setup()`` function, which prepares the ADC by writing the
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necessary settings to its registers. The program proceeds by reading
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each register to confirm these settings. Entering an operational loop,
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the code waits for ADC conversions to become available with
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``ad7124_wait_for_conv_ready()`` and reads the conversion result via
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``ad7124_read_data()``. The obtained raw ADC data is continuously
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printed to the console, demonstrating the integration process of the
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AD7124 ADC within a no-OS environment.
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No-OS Supported Platforms
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-------------------------
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Xilinx
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~~~~~~~
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Hardware Used
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^^^^^^^^^^^^^
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- :adi:`EVAL-AD7124-4SDZ`
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- ZedBoard
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Connections
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^^^^^^^^^^^
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+-----------------------+-----------------------+-----------------------+
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| **EVAL-AD7124-4SDZ | **ZedBoard Pin** | **Function / Notes** |
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| Pin** | | |
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+-----------------------+-----------------------+-----------------------+
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| CS | SPI_CS | Chip Select |
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+-----------------------+-----------------------+-----------------------+
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| SCLK | SPI_CLK | Serial Clock |
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+-----------------------+-----------------------+-----------------------+
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| DIN | SPI_MOSI | Data In (Master Out |
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| | | Slave In) |
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+-----------------------+-----------------------+-----------------------+
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| DOUT/RDY | SPI_MISO | Data Out / Data Ready |
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| | | (Master In Slave Out) |
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+-----------------------+-----------------------+-----------------------+
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| R9 to R13 | — | Remove 0Ω links to |
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| | | access SPI test |
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| | | points directly |
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+-----------------------+-----------------------+-----------------------+
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| Test Points | ZedBoard Expansion | Wire SPI signals to |
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| | | Pmod or FMC header |
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| | | pins |
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+-----------------------+-----------------------+-----------------------+
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Consult the ZedBoard User Guide for Pmod or FMC header pinouts. The
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ZedBoard provides several Pmod (2x6) headers and an FMC-LPC connector
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suitable for digital I/O.
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Double-check that all grounds are connected and consistent between the
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two boards.
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Verify the logic voltage levels are compatible. The AD7124-4 supports
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digital I/O supply (IOVDD) between 1.65V and 3.6V.
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Build Command
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^^^^^^^^^^^^^
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.. code-block:: bash
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cp <SOME_PATH>/system_top.xsa .
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# to delete current build
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make reset
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# to build the project
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make
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# to flash the code
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make run

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