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+# AD9213-EVB HDL Project
+
+- Evaluation board product page: [EVAL-AD213](https://www.analog.com/eval-ad9213)
+- System documentation: TO BE ADDED
+- HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/ad9213_evb/index.html
+
+## Supported parts
+
+| Part name                                                | Description                                                  |
+|----------------------------------------------------------|--------------------------------------------------------------|
+| [AD9213](https://www.analog.com/en/products/ad9213.html) | 12-Bit, 10.25 GSPS, JESD204B, RF Analog-to-Digital Converter |
+
+## Building the project
+
+Please enter the folder for the FPGA carrier you want to use and read the README.md.
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-# AD9213 EVB HDL Project
-
-Here are some pointers to help you:
-  * [Board Product Page](https://www.analog.com/eval-ad9213)
-  * Parts : [12-Bit, 10.25 GSPS, JESD204B, RF Analog-to-Digital Converter](https://www.analog.com/en/products/ad9213.html)
-  * Project Doc: https://wiki.analog.com/resources/eval/user-guides/ad9213_evb/start
-  * HDL Doc: https://wiki.analog.com/resources/eval/user-guides/ad9213_evb/ad9213_evb_hdl
-  * Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers-all 
diff --git a/projects/ad9213_evb/vcu118/README.md b/projects/ad9213_evb/vcu118/README.md
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+# AD9213/VCU118 HDL Project
+
+## Building the project
+
+```
+cd projects/ad9213_evb/vcu118
+make
+```
+
+The RX link mode can be found in the [AD9213 data sheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD9213.pdf).
+
+This project is not parameterizable, it has a fixed configuration.
+
+The parameters from the environment:
+
+- RX_NUM_OF_CONVERTERS: **1**; RX number of converters per link
+- RX_NUM_OF_LANES: **16**; RX number of lanes per link
+- RX_SAMPLES_PER_FRAME: **16**; RX number of samples per converter per frame
+- RX_JESD_NP: **16**; RX number of bits per sample
+- RX_SAMPLE_WIDTH: **16**; RX data width
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