diff --git a/projects/ad9083_vna/README.md b/projects/ad9083_vna/README.md new file mode 100644 index 00000000000..3b15a17a6c5 --- /dev/null +++ b/projects/ad9083_vna/README.md @@ -0,0 +1,15 @@ +# AD9083-VNA HDL Project + +- Evaluation board product page: [EVAL-AD9083](https://www.analog.com/eval-ad9083) +- System documentation: TO BE ADDED +- HDL project documentation: TO BE ADDED + +## Supported parts + +| Part name | Description | +|---------------------------------------------|---------------------------------------------------------------------| +| [AD9083](https://www.analog.com/ad9083) | 16-Channel, 125 MHz Bandwidth, JESD204B Analog-to-Digital Converter | + +## Building the project + +Please enter the folder for the FPGA carrier you want to use and read the README.md. \ No newline at end of file diff --git a/projects/ad9083_vna/Readme.md b/projects/ad9083_vna/Readme.md deleted file mode 100644 index a8e80affe0f..00000000000 --- a/projects/ad9083_vna/Readme.md +++ /dev/null @@ -1,15 +0,0 @@ -# AD9083-VNA HDL Project - -Here are some pointers to help you: - * [Board Product Page](https://www.analog.com/eval-ad9083-vna) - * Part : [AD9083 - 16-Channel, 125 MHz Bandwidth, JESD204B Analog-to-Digital Converter](https://www.analog.com/ad9083) - * Part : [ADMV8818 - 2 GHz to 18 GHz, Digitally Tunable, High-Pass and Low-Pass Filter](https://www.analog.com/admv8818) - * Part : [ADRF5021 - 9 kHz to 30 GHz, Silicon SPDT Switch](https://www.analog.com/adrf5021) - * Part : [ADRF5045 - 9 kHz to 30 GHz, Silicon, SP4T Switch](https://www.analog.com/adrf5045) - * Part : [ADF4371S - Microwave Wideband Synthesizer with Integrated VCO](https://www.analog.com/adf4371) - * Part : [ADL5960 - 10 MHz to 20 GHz, Integrated Vector Network Analyzer Front-End](https://www.analog.com/adl5960) - * Part : [HMC8411 - Low Noise Amplifier, 0.01 GHz to 10 GHz](https://www.analog.com/hmc8411) - * Part : [HMC994 - 0.5 Watt Power Amplifier, DC - 30 GHz](https://www.analog.com/hmc994) - * Project Doc: https://wiki.analog.com/resources/eval/ad9083-vna - * HDL Doc: https://wiki.analog.com/resources/eval/user-guides/ad9083_vna/ad9083_vna_reference_hdl - * Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers/iio-adc/ad9083 diff --git a/projects/ad9083_vna/zcu102/README.MD b/projects/ad9083_vna/zcu102/README.MD new file mode 100644 index 00000000000..cb89a9274ef --- /dev/null +++ b/projects/ad9083_vna/zcu102/README.MD @@ -0,0 +1,35 @@ +# AD9083-VNA/ZCU102 HDL Project + +## Building the project + +The parameters configurable through the `make` command, can be found below, as well as in the **system_project.tcl** file; it contains the default configuration. + +``` +cd projects/ad9083_vna/zcu102 +make +``` + +All of the RX link modes can be found in the [AD9083 data sheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ad9083.pdf). We offer support for only a few of them. + +If other configurations are desired, then the parameters from the HDL project (see below) need to be changed, as well as the Linux/no-OS project configurations. + +The overwritable parameters from the environment: + +- RX_JESD_M - RX number of converters per link +- RX_JESD_L - RX number of lanes per link +- RX_JESD_S - RX number of samples per converter per frame + +### Example configurations + +#### Default configuration: + +This specific command is equivalent to running `make` only: + +``` +make RX_JESD_L=1 RX_JESD_M=32 RX_JESD_S=1 +``` + +Corresponding device tree: +- [zynqmp-zcu102-rev10-ad9083-vna-15p625msps.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9083-vna-15p625msps.dts) +- AD9083 cut-off frequency 125 MHz [zynqmp-zcu102-rev10-ad9083-vna-7p8125msps.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9083-vna-7p8125msps.dts) +- AD9083 frequency 1 GHz [zynqmp-zcu102-rev10-ad9083-vna-3p90625msps.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9083-vna-3p90625msps.dts) \ No newline at end of file