projects/ad9083_vna: Updated READMEs

Signed-off-by: Cristian Mihai Popa <[email protected]>

Author: cristianmihaipopa

projects/ad9083_vna/README.md

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+# AD9083-VNA HDL Project
+
+- Evaluation board product page: [EVAL-AD9083](https://www.analog.com/eval-ad9083)
+- System documentation: TO BE ADDED
+- HDL project documentation: TO BE ADDED
+
+## Supported parts
+
+| Part name                                   | Description                                                         |
+|---------------------------------------------|---------------------------------------------------------------------|
+| [AD9083](https://www.analog.com/ad9083)     | 16-Channel, 125 MHz Bandwidth, JESD204B Analog-to-Digital Converter |
+| [ADMV8818](https://www.analog.com/admv8818) | 2 GHz to 18 GHz, Digitally Tunable, High-Pass and Low-Pass Filter   |
+| [ADRF5021](https://www.analog.com/adrf5021) | 9 kHz to 30 GHz, Silicon SPDT Switch                                |
+| [ADRF5045](https://www.analog.com/adrf5045) | 9 kHz to 30 GHz, Silicon, SP4T Switch                               |
+| [ADF4371S](https://www.analog.com/adf4371)  | Microwave Wideband Synthesizer with Integrated VCO                  |
+| [ADL5960](https://www.analog.com/adl5960)   | 10 MHz to 20 GHz, Integrated Vector Network Analyzer Front-End      |
+| [HMC8411](https://www.analog.com/hmc8411)   | Low Noise Amplifier, 0.01 GHz to 10 GHz                             |
+| [HMC994](https://www.analog.com/hmc994)     | 0.5 Watt Power Amplifier, DC - 30 GHz                               |
+
+
+## Building the project
+
+Please enter the folder for the FPGA carrier you want to use and read the README.md.

projects/ad9083_vna/Readme.md

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+# EVAL-AD9083/ZCU102 HDL Project
+
+## Building the project
+
+The parameters configurable through the `make` command, can be found below, as well as in the **system_project.tcl** file; it contains the default configuration.
+
+```
+cd projects/ad9081_fmca_ebz/zcu102
+make
+```
+
+All of the RX link modes can be found in the [AD9083 data sheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ad9083.pdf). We offer support for only a few of them.
+
+If other configurations are desired, then the parameters from the HDL project (see below) need to be changed, as well as the Linux/no-OS project configurations.
+
+The overwritable parameters from the environment:
+
+- RX_JESD_M - RX number of converters per link
+- RX_JESD_L - RX number of lanes per link
+- RX_JESD_S - RX number of samples per converter per frame
+
+### Example configurations
+
+#### Default configuration:
+
+This specific command is equivalent to running `make` only:
+
+```
+make RX_JESD_L=1 RX_JESD_M=32 RX_JESD_S=1
+```
+
+Corresponding device tree:
+- [zynqmp-zcu102-rev10-ad9083-vna-15p625msps.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9083-vna-15p625msps.dts)
+- AD9083 fc. freq. 125 MHz [zynqmp-zcu102-rev10-ad9083-vna-7p8125msps.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9083-vna-7p8125msps.dts)
+- AD9083 freq. 1 GHz [zynqmp-zcu102-rev10-ad9083-vna-3p90625msps.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9083-vna-3p90625msps.dts)