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projects/adrv9009: Updated README files
Signed-off-by: Cristian Mihai Popa <[email protected]>
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projects/adrv9009/README.md

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# ADRV9009 HDL Project
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- Evaluation board product page: [EVAL-ADRV9008-9009](https://www.analog.com/eval-adrv9008-9009)
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- System documentation:
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- [User Guide](https://analogdevicesinc.github.io/documentation/eval/user-guide/transceiver/adrv9009/index.html)
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- [IIO Oscilloscope](https://analogdevicesinc.github.io/documentation/software/iio-oscilloscope/adrv9009/index.html)
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- HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/adrv9009/index.html
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## Supported parts
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| Part name | Description |
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|---------------------------------------------|------------------------------------------------------------------|
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| [ADRV9009](https://www.analog.com/adrv9009) | Integrated Dual RF Tx, Rx, and Observation Rx |
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| [AD7291](https://www.analog.com/ad7291) | 8 channels, I2C, 12-bit SAR ADC with built-in temperature sensor |
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## Building the project
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Please enter the folder for the FPGA carrier you want to use and read the README.md.

projects/adrv9009/Readme.md

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projects/adrv9009/a10soc/README.md

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# ADRV9009/A10SOC HDL Project
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## Building the project
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This project is not parameterizable, it has a fixed configuration.
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```
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cd projects/adrv9001/a10soc
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make
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```
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Corresponding device tree: [socfpga_arria10_socdk_adrv9009_jesd204_fsm.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_adrv9009_jesd204_fsm.dts)

projects/adrv9009/s10soc/README.md

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# ADRV9009/S10SOC HDL Project
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## Building the project
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This project is not parameterizable, it has a fixed configuration.
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```
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cd projects/adrv9001/s10soc
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make
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```

projects/adrv9009/zc706/README.md

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# ADRV9009/ZC706 HDL Project
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## Building the project
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```
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cd projects/adrv9001/zc706
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make
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```
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All of the RX/TX link modes can be found in the [ADRV9009 data sheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ADRV9009.pdf). We offer support for only a few of them.
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If other configurations are desired, then the parameters from the HDL project (found in *zc706/system_project.tcl*) need to be changed, as well as the Linux/no-OS project configurations.
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The overwritable parameters from the environment:
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- [RX/TX]_JESD_M: RX: **4** & TX: **4**; [RX/TX] number of converters per link
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- [RX/TX]_JESD_L: RX: **2** & TX: **4**; [RX/TX] number of lanes per link
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- [RX/TX]_JESD_S: RX: **1** & TX: **1**; [RX/TX] number of samples per converter per frame
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- RX_OS_JESD_M: **2**; number of converters per link
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- RX_OS_JESD_L: **2**; number of lanes per link
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- RX_OS_JESD_S: **1**; number of samples per frame
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Corresponding device tree: [zynq-zc706-adv7511-adrv9009-jesd204-fsm.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-zc706-adv7511-adrv9009-jesd204-fsm.dts)

projects/adrv9009/zcu102/README.md

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# ADRV9009/ZCU102 HDL Project
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## Building the project
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```
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cd projects/adrv9001/zcu102
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make
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```
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All of the RX/TX link modes can be found in the [ADRV9009 data sheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ADRV9009.pdf). We offer support for only a few of them.
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If other configurations are desired, then the parameters from the HDL project (found in *zcu102/system_project.tcl*) need to be changed, as well as the Linux/no-OS project configurations.
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The overwritable parameters from the environment:
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- [RX/TX]_JESD_M: RX: **4** & TX: **4**; [RX/TX] number of converters per link
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- [RX/TX]_JESD_L: RX: **2** & TX: **4**; [RX/TX] number of lanes per link
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- [RX/TX]_JESD_S: RX: **1** & TX: **1**; [RX/TX] number of samples per converter per frame
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- RX_OS_JESD_M: **2**; number of converters per link
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- RX_OS_JESD_L: **2**; number of lanes per link
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- RX_OS_JESD_S: **1**; number of samples per frame
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Corresponding device tree: [zynqmp-zcu102-rev10-adrv9009-jesd204-fsm.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9009-jesd204-fsm.dts)

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