docs: ad4170_asdz: Fixed documentation

Fixed documentation and removed not yet released ADC parts.

Signed-off-by: Liviu 'Ceshu' Adace <[email protected]>

Author: ladace

docs/projects/ad4170_asdz/index.rst

@@ -6,36 +6,33 @@ AD4170_ASDZ HDL project
 Overview
 --------------------------------------------------------------------------------
 
-The HDL reference design for the :adi:`AD4170-4` and :adi:`AD4170-8` provides a
-high resolution, 24-Bit, DC to 50 kHz Input Bandwidth, Multichannel, Low Noise
-Precision Sigma-Delta ADC with PGA.
+The HDL reference design for the :adi:`AD4170-4` provides a high resolution,
+24-Bit, DC to 50 kHz Input Bandwidth, Multichannel, Low Noise Precision
+Sigma-Delta ADC with PGA.
 
-The data acquisition board incorporates the AD4170-4 or AD4170-8, a DC to 50 kHz
+The data acquisition board incorporates the AD4170-4, a DC to 50 kHz
 input bandwidth, low noise, high speed, completely integrated analog front end
 for high precision measurement applications.
 
-The AD4170-4/8 offers output data rates from 7.6 SPS up to 500 kSPS.
+The AD4170-4 offers output data rates from 7.6 SPS up to 500 kSPS.
 The device contains a low noise, 24-bit Σ-Δ analog-to-digital converter (ADC),
 and can be configured to have 4 differential inputs or 8 single-ended or
 pseudodifferential inputs. The on-chip low noise gain stage ensures that signals
-of small amplitude can be interfaced directly to the AD4170-4/8.
+of small amplitude can be interfaced directly to the AD4170-4.
 
 This project has a :ref:`spi_engine` instance to control and acquire data from
-the AD4170-4/8 24-bit precision ADC. This instance provides support for
-capturing continuous samples at the maximum sample rate.
+the AD4170-4 24-bit precision ADC. This instance provides support for capturing 
+continuous samples at the maximum sample rate.
 
 Supported boards
 -------------------------------------------------------------------------------
 
-- EVAL-AD4170-ASDZ
+- :adi:`EVAL-AD4170-4`
 
 Supported devices
 -------------------------------------------------------------------------------
 
-- :adi:`AD4170`
 - :adi:`AD4170-4`
-- :adi:`AD4171`
-- :adi:`AD4172`
 
 Supported carriers
 -------------------------------------------------------------------------------
@@ -63,7 +60,7 @@ The addresses are dependent on the architecture of the FPGA, having an offset
 added to the base address from HDL (see more at :ref:`architecture cpu-intercon-addr`).
 
 ========================  =================
-Instance                  Zynq*/DE10-Nano**
+Instance                  Zynq/DE10-Nano
 ========================  =================
 spi_ad4170_axi_regmap*    0x44A0_0000
 axi_ad4170_dma*           0x44A3_0000
@@ -278,7 +275,7 @@ HDL related
 Software related
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-- :git-linux:`AD4170 Linux driver ad4170.c <drivers/iio/adc/ad4170.c>`
+- :git-no-os:`AD4170 no-OS driver ad4170.c <drivers/iio/adc/ad4170/ad4170.c>`
 
 .. include:: ../common/more_information.rst