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hierophecthierophect
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Add DevkitC ros definition
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‎ports/espressif/boards/espressif_esp32s3_devkitc_1_n8r2_ros/board.c

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// This file is part of the CircuitPython project: https://circuitpython.org
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//
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// SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
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//
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// SPDX-License-Identifier: MIT
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#include "supervisor/board.h"
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// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.

‎ports/espressif/boards/espressif_esp32s3_devkitc_1_n8r2_ros/jtagcfg.cfg

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# SPDX-License-Identifier: GPL-2.0-or-later
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#
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# Example OpenOCD configuration file for ESP32-S3 connected via ESP USB Bridge board
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#
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# For example, OpenOCD can be started for ESP32-S3 debugging on
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#
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# openocd -f board/esp32s3-bridge.cfg
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#
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# Source the ESP32-S3 configuration file
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source [find target/esp32s3.cfg]
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adapter speed 1000

‎ports/espressif/boards/espressif_esp32s3_devkitc_1_n8r2_ros/mpconfigboard.h

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// This file is part of the CircuitPython project: https://circuitpython.org
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//
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// SPDX-FileCopyrightText: Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
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//
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// SPDX-License-Identifier: MIT
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#pragma once
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// Micropython setup
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#define MICROPY_HW_BOARD_NAME "ESP32-S3-DevKitC-1-N8R2 (ROS version)"
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#define MICROPY_HW_MCU_NAME "ESP32S3"
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#define MICROPY_HW_NEOPIXEL (&pin_GPIO48)
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#define DEFAULT_UART_BUS_RX (&pin_GPIO44)
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#define DEFAULT_UART_BUS_TX (&pin_GPIO43)

‎ports/espressif/boards/espressif_esp32s3_devkitc_1_n8r2_ros/mpconfigboard.mk

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USB_VID = 0x303A
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USB_PID = 0x7003
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USB_PRODUCT = "ESP32-S3-DevKitC-1-N8R2 CPY/ROS"
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USB_MANUFACTURER = "Espressif"
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IDF_TARGET = esp32s3
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CIRCUITPY_ESP_FLASH_SIZE = 8MB
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CIRCUITPY_ESP_FLASH_MODE = qio
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CIRCUITPY_ESP_FLASH_FREQ = 80m
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CIRCUITPY_ESP_PSRAM_SIZE = 2MB
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CIRCUITPY_ESP_PSRAM_MODE = qio
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CIRCUITPY_ESP_PSRAM_FREQ = 80m
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CIRCUITPY_RCLCPY = 1

‎ports/espressif/boards/espressif_esp32s3_devkitc_1_n8r2_ros/pins.c

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// This file is part of the CircuitPython project: https://circuitpython.org
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//
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// SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
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//
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// SPDX-License-Identifier: MIT
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#include "shared-bindings/board/__init__.h"
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static const mp_rom_map_elem_t board_module_globals_table[] = {
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CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
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{ MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
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{ MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
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{ MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
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{ MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
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{ MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
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{ MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
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{ MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
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{ MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
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{ MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
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{ MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
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{ MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
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{ MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
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{ MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
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{ MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
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{ MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
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{ MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },
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{ MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },
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{ MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
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{ MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) },
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{ MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) },
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{ MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
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{ MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },
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{ MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
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{ MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
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{ MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
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{ MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) },
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{ MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) },
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{ MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) },
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{ MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) },
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{ MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) },
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{ MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) },
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{ MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) },
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{ MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) },
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{ MP_ROM_QSTR(MP_QSTR_IO47), MP_ROM_PTR(&pin_GPIO47) },
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{ MP_ROM_QSTR(MP_QSTR_IO48), MP_ROM_PTR(&pin_GPIO48) },
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{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO48) },
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{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
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{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
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{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
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};
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MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

‎ports/espressif/boards/espressif_esp32s3_devkitc_1_n8r2_ros/sdkconfig

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CONFIG_MICRO_ROS_ESP_XRCE_DDS_MIDDLEWARE=y
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CONFIG_MICRO_ROS_ESP_NETIF_WLAN=y
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CONFIG_MICRO_ROS_AGENT_IP="192.168.1.100"
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CONFIG_MICRO_ROS_AGENT_PORT="8888"
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CONFIG_MICRO_ROS_APP_STACK=16000
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CONFIG_MICRO_ROS_APP_TASK_PRIO=5

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