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miladfarcaV8 LUCI CQ
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V8 LUCI CQ
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PPC [liftoff]: re-enable extract lane ops
Intermittent issues were fixed here: crrev.com/c/3840820 Change-Id: If0e7acc57053ecfa188ca2c858029da7fdf4ff27 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3859519 Commit-Queue: Milad Farazmand <[email protected]> Reviewed-by: Junliang Yan <[email protected]> Cr-Commit-Position: refs/heads/main@{#82783}
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src/wasm/baseline/ppc/liftoff-assembler-ppc.h

+16-8
Original file line numberDiff line numberDiff line change
@@ -1786,49 +1786,57 @@ void LiftoffAssembler::emit_i8x16_splat(LiftoffRegister dst,
17861786
void LiftoffAssembler::emit_f64x2_extract_lane(LiftoffRegister dst,
17871787
LiftoffRegister lhs,
17881788
uint8_t imm_lane_idx) {
1789-
bailout(kUnsupportedArchitecture, "emit_f64x2extractlane");
1789+
F64x2ExtractLane(dst.fp(), lhs.fp().toSimd(), imm_lane_idx,
1790+
kScratchSimd128Reg, r0);
17901791
}
17911792

17921793
void LiftoffAssembler::emit_f32x4_extract_lane(LiftoffRegister dst,
17931794
LiftoffRegister lhs,
17941795
uint8_t imm_lane_idx) {
1795-
bailout(kUnsupportedArchitecture, "emit_f32x4extractlane");
1796+
F32x4ExtractLane(dst.fp(), lhs.fp().toSimd(), imm_lane_idx,
1797+
kScratchSimd128Reg, r0, ip);
17961798
}
17971799

17981800
void LiftoffAssembler::emit_i64x2_extract_lane(LiftoffRegister dst,
17991801
LiftoffRegister lhs,
18001802
uint8_t imm_lane_idx) {
1801-
bailout(kUnsupportedArchitecture, "emit_i64x2extractlane");
1803+
I64x2ExtractLane(dst.gp(), lhs.fp().toSimd(), imm_lane_idx,
1804+
kScratchSimd128Reg);
18021805
}
18031806

18041807
void LiftoffAssembler::emit_i32x4_extract_lane(LiftoffRegister dst,
18051808
LiftoffRegister lhs,
18061809
uint8_t imm_lane_idx) {
1807-
bailout(kUnsupportedArchitecture, "emit_i32x4extractlane");
1810+
I32x4ExtractLane(dst.gp(), lhs.fp().toSimd(), imm_lane_idx,
1811+
kScratchSimd128Reg);
18081812
}
18091813

18101814
void LiftoffAssembler::emit_i16x8_extract_lane_u(LiftoffRegister dst,
18111815
LiftoffRegister lhs,
18121816
uint8_t imm_lane_idx) {
1813-
bailout(kUnsupportedArchitecture, "emit_i16x8extractlane_u");
1817+
I16x8ExtractLaneU(dst.gp(), lhs.fp().toSimd(), imm_lane_idx,
1818+
kScratchSimd128Reg);
18141819
}
18151820

18161821
void LiftoffAssembler::emit_i16x8_extract_lane_s(LiftoffRegister dst,
18171822
LiftoffRegister lhs,
18181823
uint8_t imm_lane_idx) {
1819-
bailout(kUnsupportedArchitecture, "emit_i16x8extractlane_s");
1824+
I16x8ExtractLaneS(dst.gp(), lhs.fp().toSimd(), imm_lane_idx,
1825+
kScratchSimd128Reg);
18201826
}
18211827

18221828
void LiftoffAssembler::emit_i8x16_extract_lane_u(LiftoffRegister dst,
18231829
LiftoffRegister lhs,
18241830
uint8_t imm_lane_idx) {
1825-
bailout(kUnsupportedArchitecture, "emit_i8x16extractlane_u");
1831+
I8x16ExtractLaneU(dst.gp(), lhs.fp().toSimd(), imm_lane_idx,
1832+
kScratchSimd128Reg);
18261833
}
18271834

18281835
void LiftoffAssembler::emit_i8x16_extract_lane_s(LiftoffRegister dst,
18291836
LiftoffRegister lhs,
18301837
uint8_t imm_lane_idx) {
1831-
bailout(kUnsupportedArchitecture, "emit_i8x16extractlane_s");
1838+
I8x16ExtractLaneS(dst.gp(), lhs.fp().toSimd(), imm_lane_idx,
1839+
kScratchSimd128Reg);
18321840
}
18331841

18341842
void LiftoffAssembler::emit_f64x2_replace_lane(LiftoffRegister dst,

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