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[AMD][MI355X] Kimi-K3 vLLM AgentX nightly 81198e97 with dcp8 c1-c48 sweep / [AMD][MI355X] Kimi-K3 vLLM AgentX 更新镜像至 nightly 81198e97 并改为 dcp8 c1-c48 扫描 - #3833

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amd/kimik3-mi355x-vllm-1005
Oct 12, 2026
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seungrokj merged 14 commits into
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amd/kimik3-mi355x-vllm-1005

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@seungrokj seungrokj commented Oct 8, 2026 •

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Summary

  • Move kimik3-fp4-mi355x-vllm-agentic-mtp (configs/amd-master.yaml) and its recipe (benchmarks/single_node/srt-slurm-recipes/kimik3/vllm/mi355x-fp4-mtp/agentic.yaml) from vllm/vllm-openai-rocm:nightly-rocm100-36768d1bfd39094681cdbc8cb37d4b31c0729c89 to vllm/vllm-openai-rocm:nightly-rocm100-81198e97ba7eee2a22540caaa756b7fdddcb4d93. Follows [AMD][MI355X] Kimi-K3 vLLM AgentX FP8 per-channel linear quantization-config / [AMD][MI355X] Kimi-K3 vLLM AgentX 新增 FP8 per-channel linear quantization-config #3627.
  • Concurrency sweep:
    • dcp1, no KV offload: c1 (was c1/c4).
    • dcp8, no KV offload: c1 (new).
    • dcp8, SimpleCPUOffload DRAM tier: c4, c10, c12, c14, c16 (was dcp1 c8-c14).
    • dcp8, SimpleCPUOffload DRAM tier: c44, c48 (was c44/c48/c70).
  • Recipe variants (one per point, matched by CONC, KV_OFFLOADING and DCP_SIZE):
    • override_tp8_c1_dcp8 (new): dcp8 a2a, GPU-resident, DSpark k=7, FP8 linear quantization, graphs 2-16.
    • override_tp8_c4_dcp8_simple (new): as c4, plus dcp8 a2a and the DRAM tier (224.875 GB/rank); DSpark k=5, graphs 2-48.
    • override_tp8_c10/c12/c14/c16_dcp8_simple: the former dcp1 mid band moved to dcp8.
    • override_tp8_c44/c48/c50_dcp8_simple: DSpark k=4 (previously no draft); c70 is renamed c50.
    • override_tp8_c14_dcp8_simple and override_tp8_c16_dcp8_simple use DSpark k=4 (was 3).
  • CUDA graph capture lists are every even size up to 2 x CONC x (1 + num_speculative_tokens); max-num-seqs is 2 x CONC.
  • Every variant requests cudagraph_mode FULL_AND_PIECEWISE (c10-c14 were FULL) with VLLM_USE_BREAKABLE_CUDAGRAPH=0 (c1/c4 were 1). The AMD K3 model has no torch.compile submodule, so vLLM overrides the mode to FULL_DECODE_ONLY at load (seen in the c1 and c14 server logs).
  • Base args add stream-interval: 10 and VLLM_ROCM_AITER_MLA_DCP_VERIFY=asm (DCP multi-token verify through the AITER ASM round-robin decode) to every point.
  • c1 (dcp1 and dcp8) adds quantization-config linear fp8_per_channel: the target's linear layers are quantized to FP8 W8A8 at load, except kv_b_proj, in_proj_qkvgfab, f_b_proj, fused_qkv_a_proj, self_attn.g_proj and layer-0 mlp.down_proj (BF16); routed experts stay MXFP4. The Inferact/Kimi-K3-DSpark draft's precision is unchanged (BF16 weights, fp8 KV).
  • Agentic runs replace block rejection with the golden acceptance length at every draft point.
Variant CONC dcp KV offload DSpark k max_cudagraph_capture_size
override_tp8_c1 1 1 none 7 16
override_tp8_c1_dcp8 1 8 none 7 16
override_tp8_c4_dcp8_simple 4 8 dram 5 48
override_tp8_c10_dcp8_simple 10 8 dram 4 100
override_tp8_c12_dcp8_simple 12 8 dram 3 96
override_tp8_c14_dcp8_simple 14 8 dram 4 140
override_tp8_c16_dcp8_simple 16 8 dram 4 160
override_tp8_c44_dcp8_simple 44 8 dram 4 440
override_tp8_c48_dcp8_simple 48 8 dram 4 480

override_tp8_c4 (dcp1) and override_tp8_c50_dcp8_simple stay in the recipe but are not swept.

Validation

  • Each of the 9 matrix points matches exactly one recipe variant under infx.srt_slurm.single_node.validate_recipe (image, CONC, KV_OFFLOADING, DCP_SIZE, TOTAL_CPU_DRAM_GB 1799).
  • Every variant's max_cudagraph_capture_size equals 2 x CONC x (1 + num_speculative_tokens), and its capture list covers every even size up to it.
  • perf-changelog.yaml has a kimik3-fp4-mi355x-vllm-agentic-mtp entry for this PR, appended at the end of the file.
  • CI sweep (run 37809542821): the c14 dcp8 point hit an NCCL all-gather timeout, and some points failed startup on leftover GPU memory from earlier jobs on the runner node; the full sweep has not yet completed cleanly.
中文

概要

  • 将 kimik3-fp4-mi355x-vllm-agentic-mtp(configs/amd-master.yaml)及其 recipe 的镜像由 nightly-rocm100-36768d1… 更新为 nightly-rocm100-81198e97…。承接 [AMD][MI355X] Kimi-K3 vLLM AgentX FP8 per-channel linear quantization-config / [AMD][MI355X] Kimi-K3 vLLM AgentX 新增 FP8 per-channel linear quantization-config #3627。
  • 并发扫描:dcp1 无 KV 卸载 c1;dcp8 无 KV 卸载 c1(新增);dcp8 + SimpleCPUOffload DRAM 卸载 c4、c10、c12、c14、c16 以及 c44、c48。
  • 新增 override_tp8_c4_dcp8_simple(沿用 c4 配置,加 dcp8 a2a 与 DRAM 卸载,DSpark k=5);c14/c16 的 DSpark 草稿长度由 3 改为 4。
  • CUDA graph 捕获覆盖 2 至 2 x CONC x (1 + num_speculative_tokens) 的所有偶数;max-num-seqs 为 2 x CONC。
  • 所有变体请求 FULL_AND_PIECEWISE(c10-c14 原为 FULL),并关闭 breakable CUDA graph(c1/c4 原为 1);AMD K3 模型没有 torch.compile 子模块,vLLM 加载时改为 FULL_DECODE_ONLY。
  • 所有点位新增 stream-interval: 10 与 VLLM_ROCM_AITER_MLA_DCP_VERIFY=asm。
  • c1(dcp1 与 dcp8)新增 quantization-config linear fp8_per_channel,目标模型线性层加载时量化为 FP8 W8A8(部分层保持 BF16),routed experts 仍为 MXFP4;DSpark 草稿模型精度不变。
  • agentic 运行时,所有草稿点位均以 golden acceptance length 替代 block rejection。

验证

  • 9 个 matrix 点经 validate_recipe 各自恰好匹配一个 recipe 变体。
  • 所有变体的 max_cudagraph_capture_size 均等于 2 x CONC x (1 + num_speculative_tokens)。
  • 本 PR 在 perf-changelog.yaml 末尾新增 kimik3-fp4-mi355x-vllm-agentic-mtp 条目。
  • CI sweep(run 37809542821):c14 dcp8 出现 NCCL all-gather 超时,部分点位因节点残留显存启动失败,完整 sweep 尚未全部通过。

AI model disclosure

Prepared with Claude Opus 5.5 (claude-opus-5-5) via Claude Code, the sole contributing model (recipe variants, PR text, validation).

🤖 Generated with Claude Code

seungrokj and others added 5 commits October 5, 2026 19:37
…d c44-c50

Move the mid band to dcp8 (c10/c12/c14/c16) and the throughput band to
c44/c48/c50 with a 4-token DSpark draft, dropping the unused c8 and c70
variants. CUDA graphs capture every even size up to 2x CONC x (1 + drafts).
Add stream-interval 10 and VLLM_ROCM_AITER_MLA_DCP_VERIFY=asm to the base
recipe, and FP8 per-channel online quantization of linears to c1.

将中段改为 dcp8(c10/c12/c14/c16),吞吐段改为 c44/c48/c50 并使用 4 token
DSpark 草稿,移除不再使用的 c8 与 c70 变体。CUDA graph 捕获不超过
2x CONC x (1 + drafts) 的所有偶数尺寸。基础配方新增 stream-interval 10 与
VLLM_ROCM_AITER_MLA_DCP_VERIFY=asm,c1 新增线性层 FP8 per-channel 在线量化。

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
…nd dcp8 c48

Comment out the full band lists in amd-master.yaml and run one point per
band: c1 (dcp1, GPU-resident), c10 and c48 (dcp8, DRAM offload).

在 amd-master.yaml 中注释掉完整的分段列表,每段只运行一个点:c1(dcp1,
GPU 常驻)、c10 与 c48(dcp8,DRAM offload)。

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Add override_tp8_c1_dcp8, the c1 variant with decode-context-parallel-size 8
over a2a, and narrow the amd-master.yaml sweep to that single c1 dcp8 point.

新增 override_tp8_c1_dcp8:在 c1 变体基础上使用 a2a 的
decode-context-parallel-size 8,并将 amd-master.yaml 扫描缩小为该 c1 dcp8 单点。

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Re-enable the dcp8 DRAM-offload c48 point and disable c1 dcp8 to
reproduce the c48 NCCL watchdog hang.

仅运行 Kimi-K3 MI355X vLLM dcp8 c48:重新启用 dcp8 DRAM 卸载 c48 配置点,
禁用 c1 dcp8,以复现 c48 的 NCCL watchdog 挂起问题。

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
…1-c48

Move kimik3-fp4-mi355x-vllm-agentic-mtp and its recipe to the
nightly-rocm100-81198e97 image and sweep dcp1 c1, dcp8 c1 (GPU-resident)
and dcp8 DRAM-offload c4, c10-c16, c44, c48. Add override_tp8_c4_dcp8_simple
and raise the c14/c16 DSpark draft from 3 to 4 tokens, with graph capture
sized to 2 x CONC x (1 + drafts).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
@seungrokj seungrokj added AMD agentx AgentX benchmarks, recipes, and infrastructure labels Oct 8, 2026
@seungrokj
seungrokj requested a review from a team October 8, 2026 16:12
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Thanks for the contribution!

  • Review: If this PR changes files owned by someone other than a repository admin or @SemiAnalysisAI/core, ask one eligible CODEOWNER to complete the latest PR_REVIEW_CHECKLIST.md before contacting a core maintainer on Slack. Follow the template exactly, including As a PR reviewer and CODEOWNER, I have reviewed this and have, so sign-off verification triggers.
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  • After merging: PR authors must ensure all GitHub Actions jobs pass. Transient failures often pass on rerun; see how to rerun failed jobs.
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感谢你的贡献!

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@seungrokj seungrokj added full-sweep-enabled Full sweep with canary gate; matrix jobs run to completion despite failures and removed full-sweep-enabled Full sweep with canary gate; matrix jobs run to completion despite failures labels Oct 8, 2026
Set VLLM_USE_BREAKABLE_CUDAGRAPH to 0 in override_tp8_c1,
override_tp8_c1_dcp8, override_tp8_c4 and override_tp8_c4_dcp8_simple.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

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Beyond the inline findings, I also checked whether the throughput band's switch to even-only cudagraph_capture_sizes plus the new max_cudagraph_capture_size drops coverage for long-context prefill shapes in override_tp8_c44_dcp8_simple — the capture list still spans up to 2 * CONC * (1 + num_speculative_tokens) as described in the PR, so this isn't a gap.

Extended reasoning...

The diff re-partitions concurrency bands, speculative-decoding configs, and cudagraph sizing for the Kimi-K3 MI355X vLLM AgentX recipe and its master-config entry; it touches no auth/crypto/injection surface, but three issues were confirmed (an exp-name selection ambiguity from the new dcp8 c1 variant, a missing perf-changelog.yaml entry despite performance-affecting changes, and a stale band-boundary comment), which are enough to withhold approval. I additionally verified the throughput-band cudagraph capture-size concern raised as a candidate and found it does not hold given the stated sizing formula.

Findings marked 🟡 are optional suggestions and need no follow-up push.

Additional findings (outside the current diff — GitHub can't attach inline comments there):

  • 🔴 inferencex-e2e/configs/amd-master.yaml — This change bumps the vLLM image pin, re-partitions concurrency bands to dcp8, and rewrites cudagraph/speculative-config across 9 recipe variants, but adds no inferencex-e2e/perf-changelog.yaml entry. AGENTS.md's "Non-negotiable benchmark invariants" (around line 125) requires an append-only perf-changelog.yaml entry for every change that can affect benchmark performance or any recipe addition/modification; this PR changes the image, concurrency points, DSpark draft lengths and cudagraph capture sizes without one, so downstream consumers of the changelog lose the record of why these numbers moved. Fix: add an append-only perf-changelog.yaml entry documenting the image bump and the band re-partition before merging. [also at: inferencex-e2e/perf-changelog.yaml:1 - This PR changes the image pin, speculative-decoding drafts, cudagraph capture sizes and concurrency sweep for kimik3-fp4-mi355x-vllm-agentic-mtp but adds no perf-changelog.yaml entry.]

    Why this was flagged

    The diff changes the pinned image (36768d1...->81198e97... at amd-master.yaml:729 and agentic.yaml:14), the search-space conc-lists (amd-master.yaml:736-739), and per-variant speculative-config/cudagraph_capture_sizes throughout agentic.yaml. AGENTS.md:125 states 'Every change that can affect benchmark performance and every recipe addition or modification requires a new inferencex-e2e/perf-changelog.yaml entry.' No file named perf-changelog.yaml appears in git diff --stat for this change (only the two listed files are touched). On base, every such change carries a changelog entry; here the record of this performance-relevant change is absent, breaking the invariant the repo relies on to track benchmark number provenance.

    Verification: normal. The diff touches only two files (git diff --stat: agentic.yaml and configs/amd-master.yaml) and does not modify inferencex-e2e/perf-changelog.yaml, which exists in the repo as a tracked append-only file.

Comment on lines +736 to +737
- { tp: 8, ep: 1, dcp-size: 1, kv-offloading: none, conc-list: [1], spec-decoding: mtp, srt-recipe: benchmarks/single_node/srt-slurm-recipes/kimik3/vllm/mi355x-fp4-mtp/agentic.yaml }
- { tp: 8, ep: 1, dcp-size: 8, kv-offloading: none, conc-list: [1], spec-decoding: mtp, srt-recipe: benchmarks/single_node/srt-slurm-recipes/kimik3/vllm/mi355x-fp4-mtp/agentic.yaml }

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🔴 Adding the new dcp8 c1 row makes --exp-names selection for kimik3-fp4-mi355x-vllm-agentic-mtp ambiguous where it worked on the base branch. _agentic_entries in inferencex-e2e/infx/matrix/generate.py builds exp-name as {model}_tp{tp}_conc{conc}_{kv_offload_suffix}_spec-{spec_decoding} (lines ~1176-1192) without dcp-size, so the new row at amd-master.yaml:737 (dcp-size 8, kv-offloading none, conc-list [1]) and the existing row at amd-master.yaml:736 (dcp-size 1, same conc/offload/spec) both produce kimik3_tp8_conc1_kvnone_spec-mtp. Fix: include dcp-size (or another topology-distinguishing field) in the agentic exp-name format so two rows that differ only by dcp-size are no longer the same string.

Why this was flagged

Trigger: python -m infx.matrix generate test-config --config-keys kimik3-fp4-mi355x-vllm-agentic-mtp --exp-names kimik3_tp8_conc1_kvnone_spec-mtp, the standard way to select one generated point for a qualification/rerun sweep. _agentic_entries (generate.py ~1176-1192) computes exp_name from model_code, tp, conc, kv_offload suffix and spec_decoding only; dcp_size is not part of it. filter_exp_names (generate.py:1552-1570) then finds the name matches both the dcp-size:1 row (amd-master.yaml:736) and the new dcp-size:8 row (amd-master.yaml:737) and raises "Experiment name(s) matched multiple rows", which is new: on the base branch only one row had conc=1/kv-offloading=none, so the same name resolved unambiguously. Any existing script, doc, or CI step referencing this exp-name for a single point now fails. Result storage (RESULT_FILENAME_BASE in .github/workflows/benchmark-tmpl.yml:288) still disambiguates via a separate dcp${DCP_SIZE} token, so this is a name-based selection regression, not a data clobber.

Verification: This PR introduces a genuine exp-name collision that makes --exp-names selection of the conc1/kvnone point ambiguous where it was unique on the base branch. generate.py:1188-1192 builds the agentic exp-name from model_code, tp, conc, kv-offload suffix, and spec_decoding only; dcp_size is never encoded.

# mid (8-14) dcp 1, DSpark draft, SimpleCPUOffload DRAM tier.
# throughput (44-70) dcp 8 shards the KV read across all 8 GPUs, DRAM
# offload, mtp with synthetic acceptance (no draft).
# mid (10-16) dcp 8, DSpark draft, SimpleCPUOffload DRAM tier.

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🟡 (optional) The rewritten band-boundary comment for kimik3-fp4-mi355x-vllm-agentic-mtp is now inaccurate, which can mislead anyone reading the config to pick wrong concurrency points (nit). It still says 'interactive (1, 4)' though conc 4 was dropped from the interactive band, and 'mid (10-16)' though the actual mid conc-list is [4, 10, 12, 14, 16] (amd-master.yaml:736) — conc 4 moved into mid, not interactive. Fix: update the comment to 'interactive (1)' and 'mid (4, 10-16)' to match the search-space rows, consistent with the companion agentic.yaml:4-6 comment which was updated correctly.

Why this was flagged

amd-master.yaml:719 reads '# interactive (1, 4) GPU-resident, dcp 1, DSpark draft.' and amd-master.yaml:720 reads '# mid (10-16) dcp 8, DSpark draft, SimpleCPUOffload DRAM tier.' The actual search-space at amd-master.yaml:734-736 has interactive conc-list [1] (dcp1) and [1] (dcp8), with conc 4 now in the dram-offload mid band's conc-list [4, 10, 12, 14, 16]. The sibling recipe file's own header comment (agentic.yaml:4-6) was updated correctly to 'interactive dcp1/dcp8 c1 ... mid dcp8 c4-c16', showing the master-config comment was simply missed during the rewrite.

Verification: nit. Documentation-only inaccuracy, nothing breaks at runtime. amd-master.yaml:718 reads # interactive (1, 4) GPU-resident, dcp 1, DSpark draft. but the interactive search-space rows (736-737) now carry conc-list [1] only (one dcp1, one dcp8) — conc 4 is removed and the new dcp8 c1 row is undocumented. amd-master.yaml:719 reads # mid (10-16) dcp 8... but the mid dram band at line 738 is conc-list: [4, 10, 12, 14, 16], so conc 4 actually sits in mid, and "10-16" omits it.

Switch c10/c12/c14/c16 from FULL to FULL_AND_PIECEWISE so all overrides
request the same cudagraph mode, refresh the recipe comment, and add the
perf-changelog entry for #3833.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Does this PR change any dtypes in the DSpark draft model? No.

I checked the vLLM source at the image commit 81198e97ba7eee2a22540caaa756b7fdddcb4d93 and confirmed it in the c1 server log from run 37809542821.

The only dtype change in this PR is the new quantization-config with linear: fp8_per_channel, on override_tp8_c1 and override_tp8_c1_dcp8 only. It converts the target model's linear layers to FP8 W8A8 at load time, except the ignored layers. The other changes (image bump, stream-interval, VLLM_ROCM_AITER_MLA_DCP_VERIFY=asm, draft lengths, cudagraph settings) don't affect dtypes.

Why that setting doesn't reach the draft:

  1. The draft gets its own model config, without the setting. In vllm/config/speculative.py (L1283-1305), the draft's ModelConfig receives quantization=self.quantization and never receives quantization_config. The draft only inherits the target's quantization when no draft model is given (L1153-1164). This recipe names "model":"Inferact/Kimi-K3-DSpark", so the value stays None.
  2. The draft checkpoint isn't quantized. Inferact/Kimi-K3-DSpark/config.json declares K3DSparkModel with torch_dtype: bfloat16 and no quantization_config, so nothing in the checkpoint turns quantization on.
  3. The draft layers use the draft's config. Every quantizable draft layer in vllm/models/kimi_k3/nvidia/dspark_mla.py (context_proj, context_kv_proj, each layer's MLA attention and KimiMLP) takes its quant config from get_draft_quant_config(vllm_config). That function (vllm/model_executor/models/utils.py L977) looks only at the draft's config, so it returns None and these layers stay unquantized BF16.
  4. The FP8 rule is attached only to the target. The online config is attached in get_quant_config() (vllm/model_executor/model_loader/weight_utils.py L212-263), which only runs for a model that has a quantization method: the target.
  5. The layers the draft shares with the target aren't converted. The draft reuses the target's embedding and lm_head. The online FP8 rule only applies to linear layers (online/base.py L378-401), and these two aren't linear layers, so they keep their dtype.
  6. The draft's KV cache doesn't change. It's "kv_cache_dtype":"fp8" in the speculative config before and after this PR.

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/reuse-sweep-run 37809542821

seungrokj and others added 4 commits October 9, 2026 13:14
Correct the kimik3-fp4-mi355x-vllm-agentic-mtp perf-changelog entry:
- Every point requests FULL_AND_PIECEWISE (the mid band was FULL) with
  breakable CUDA graphs off; without a torch.compile submodule vLLM
  overrides it to FULL_DECODE_ONLY, as the c1 and c14 server logs show.
- Golden (synthetic) acceptance applies at every draft point in agentic
  runs, not only the throughput band; note the c14 draft length 3 -> 4.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
…1-c48

- Update the image from vllm/vllm-openai-rocm:nightly-rocm100-36768d1bfd39094681cdbc8cb37d4b31c0729c89 to vllm/vllm-openai-rocm:nightly-rocm100-81198e97ba7eee2a22540caaa756b7fdddcb4d93.
- Sweep dcp1 concurrency 1 and dcp8 concurrency 1 GPU-resident, and dcp8 concurrency 4, 10, 12, 14, 16, 44 and 48 with the SimpleCPUOffloadConnector DRAM tier (224.875 GB/rank). This replaces dcp1 concurrency 1/4, dcp1 DRAM-offload concurrency 8-14 and dcp8 concurrency 44/48/70. The dcp8 points use the a2a DCP backend.
- DSpark draft length per point: 7 at concurrency 1, 5 at 4, 4 at 10, 3 at 12, and 4 at 14, 16, 44 and 48 (concurrency 14 was 3). The throughput band (44, 48) previously had no speculative-config and now runs the 4-token DSpark draft. As at every draft point, agentic runs replace block rejection with the golden acceptance length for that draft length.
- Admission is 2x concurrency. CUDA graphs capture every even size up to 2x concurrency x (1 + draft tokens), replacing the previous every-size lists (up to 8192 in the throughput band).
- Every point requests cudagraph_mode FULL_AND_PIECEWISE (the mid band was FULL) with breakable CUDA graphs disabled (VLLM_USE_BREAKABLE_CUDAGRAPH=0, previously 1 at concurrency 1 and 4). The AMD Kimi-K3 model has no torch.compile submodule, so vLLM overrides the mode to FULL_DECODE_ONLY at load, as the concurrency 1 and 14 server logs show.
- Add stream-interval 10 and VLLM_ROCM_AITER_MLA_DCP_VERIFY=asm, which routes DCP multi-token verify through the AITER ASM round-robin decode, to every point.
- Concurrency 1 (dcp1 and dcp8) adds quantization-config linear fp8_per_channel: vLLM quantizes the target's linear layers to FP8 W8A8 at load, except kv_b_proj, in_proj_qkvgfab, f_b_proj, fused_qkv_a_proj, self_attn.g_proj and layer 0 mlp.down_proj, which stay BF16. The routed experts stay MXFP4.
- No change to the Inferact/Kimi-K3-DSpark draft's precision: its model config takes the speculative config's own quantization (unset) and never receives quantization-config, and get_draft_quant_config() returns None for K3DSparkModel, so its weights stay BF16 and its KV cache stays fp8.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

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lgtm @seungrokj feel free to merge it after the vllm recipes merge

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Kimi-K3 accuracy evals on MI355X (c=1 / c=2 / c=4)

Image vllm/vllm-openai-rocm:nightly-rocm100-81198e97ba7eee2a22540caaa756b7fdddcb4d93, Inferact/Kimi-K3-DSpark draft, lm-eval local-chat-completions with num_concurrent = CONC (vLLM PR #60397 accuracy protocol).

Server config. The server ran tp8, dcp1, fp8 KV, no KV offload and no quantization-config, with vLLM PR #60683 applied (VLLM_ROCM_MONO_K3=1) and VLLM_USE_BREAKABLE_CUDAGRAPH=1. max-num-seqs was 2 x CONC. This is not identical to the recipe variants in this PR (which use dcp8 and FP8 linear at c1, and the DRAM tier at c4).

Eval c=1 (k=7) c=2 (k=3) c=4 (k=4)
GSM8K, 5-shot, 1319 q, temp 0 (strict) 0.9697 0.9704 0.9697
RULER NIAH single_1 / multikey_2 / multikey_3 at 32K, 128K, 256K (40 samples each, thinking on) all 1.000 all 1.000 all 1.000
GPQA-Diamond, Moonshot settings (temp 1.0, top_p 0.95, 128K, 1 seed) 0.9040 0.9066 0.9091
GPQA-Diamond, same samples re-extracted (case / bold / boxed) 0.9268 0.9167 0.9343
AIME25, boxed, temp 0.6, 64K, mean of 4 seeds 0.9333 0.8833 (0.867–0.933) 0.9583 (0.933–1.000)
Mean accepted draft length, GSM8K / GPQA 4.72 / 2.62 3.36 / 2.33 3.84 / 2.44
  • Accuracy is flat across concurrency. GSM8K, NIAH and GPQA show no degradation from c=1 to c=4.
  • AIME25 at c=2 is the lowest. With 30 questions, one question is worth 0.033, and c=4 scored higher, so this looks like seed noise rather than a regression.
  • c=1 also ran GPQA-Diamond with the default settings (temp 0.6, 32K, 2 seeds): mean 0.8965, or 0.9141 re-extracted.
  • k (num_speculative_tokens) differs per concurrency, so accepted draft lengths are not directly comparable across columns.
  • Every eval exited with rc=0.

@seungrokj
seungrokj merged commit 4f00011 into main Oct 12, 2026
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@seungrokj
seungrokj deleted the amd/kimik3-mi355x-vllm-1005 branch October 12, 2026 06:08
@seungrokj

seungrokj commented Oct 12, 2026 •

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@functionstackx for the record, merged this PR before the recipe as the recipe is not necessary to reproduce this perf. I commented to the recipe vllm-project/recipes#1093 (comment) and also here: https://github.com/vllm-project/vllm/pull/59965/changes#diff-b7538eee1327212c7cfbe3f7874600dfcd41b5fb5662695cd5f396294610ddf9

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