|
132 | 132 | //! sanitized f32 compare generation |
133 | 133 | //! DIV_DISABLE_F32_SELP default: false; set 1/true/yes/on to suppress |
134 | 134 | //! sanitized setp.f32 + selp.f32 generation |
| 135 | +//! DIV_DISABLE_F64_ARITH default: false; set 1/true/yes/on to suppress |
| 136 | +//! sanitized f64 arithmetic generation |
| 137 | +//! DIV_DISABLE_F64_COMPARE default: false; set 1/true/yes/on to suppress |
| 138 | +//! sanitized f64 compare generation |
| 139 | +//! DIV_DISABLE_F64_SELP default: false; set 1/true/yes/on to suppress |
| 140 | +//! sanitized setp.f64 + selp.f64 generation |
135 | 141 | //! DIV_DISABLE_SIGNED_CMP default: false; set 1/true/yes/on to suppress |
136 | 142 | //! PTX setp.{lt,le,gt,ge}.s32 generation |
137 | 143 | //! DIV_DISABLE_SIGNED_DIVREM default: false; set 1/true/yes/on to suppress |
@@ -579,6 +585,12 @@ struct Args { |
579 | 585 | #[arg(long)] |
580 | 586 | disable_f32_selp: bool, |
581 | 587 | #[arg(long)] |
| 588 | + disable_f64_arith: bool, |
| 589 | + #[arg(long)] |
| 590 | + disable_f64_compare: bool, |
| 591 | + #[arg(long)] |
| 592 | + disable_f64_selp: bool, |
| 593 | + #[arg(long)] |
582 | 594 | disable_signed_cmp: bool, |
583 | 595 | #[arg(long)] |
584 | 596 | disable_signed_divrem: bool, |
@@ -967,6 +979,9 @@ impl Args { |
967 | 979 | set_bool!(self.disable_f32_cvt, "DIV_DISABLE_F32_CVT"); |
968 | 980 | set_bool!(self.disable_f32_compare, "DIV_DISABLE_F32_COMPARE"); |
969 | 981 | set_bool!(self.disable_f32_selp, "DIV_DISABLE_F32_SELP"); |
| 982 | + set_bool!(self.disable_f64_arith, "DIV_DISABLE_F64_ARITH"); |
| 983 | + set_bool!(self.disable_f64_compare, "DIV_DISABLE_F64_COMPARE"); |
| 984 | + set_bool!(self.disable_f64_selp, "DIV_DISABLE_F64_SELP"); |
970 | 985 | set_bool!(self.disable_signed_cmp, "DIV_DISABLE_SIGNED_CMP"); |
971 | 986 | set_bool!(self.disable_signed_divrem, "DIV_DISABLE_SIGNED_DIVREM"); |
972 | 987 | set_bool!(self.disable_reg_divrem, "DIV_DISABLE_REG_DIVREM"); |
@@ -1359,6 +1374,9 @@ impl Config { |
1359 | 1374 | let disable_f32_cvt = env_bool("DIV_DISABLE_F32_CVT")?.unwrap_or(false); |
1360 | 1375 | let disable_f32_compare = env_bool("DIV_DISABLE_F32_COMPARE")?.unwrap_or(false); |
1361 | 1376 | let disable_f32_selp = env_bool("DIV_DISABLE_F32_SELP")?.unwrap_or(false); |
| 1377 | + let disable_f64_arith = env_bool("DIV_DISABLE_F64_ARITH")?.unwrap_or(false); |
| 1378 | + let disable_f64_compare = env_bool("DIV_DISABLE_F64_COMPARE")?.unwrap_or(false); |
| 1379 | + let disable_f64_selp = env_bool("DIV_DISABLE_F64_SELP")?.unwrap_or(false); |
1362 | 1380 | let disable_signed_cmp = env_bool("DIV_DISABLE_SIGNED_CMP")?.unwrap_or(false); |
1363 | 1381 | let disable_signed_divrem = env_bool("DIV_DISABLE_SIGNED_DIVREM")?.unwrap_or(false); |
1364 | 1382 | let disable_reg_divrem = env_bool("DIV_DISABLE_REG_DIVREM")?.unwrap_or(false); |
@@ -1592,6 +1610,9 @@ impl Config { |
1592 | 1610 | emit_f32_cvt: !disable_f32_cvt && !disable_bitwise_binops, |
1593 | 1611 | emit_f32_compare: !disable_f32_compare && !disable_bitwise_binops, |
1594 | 1612 | emit_f32_selp: !disable_f32_selp && !disable_f32_compare && !disable_bitwise_binops, |
| 1613 | + emit_f64_arith: !disable_f64_arith && !disable_bitwise_binops, |
| 1614 | + emit_f64_compare: !disable_f64_compare && !disable_bitwise_binops, |
| 1615 | + emit_f64_selp: !disable_f64_selp && !disable_f64_compare && !disable_bitwise_binops, |
1595 | 1616 | emit_signed_cmp: !disable_signed_cmp, |
1596 | 1617 | emit_signed_divrem: !disable_signed_divrem, |
1597 | 1618 | emit_reg_divrem: !disable_reg_divrem && !disable_bitwise_binops && !disable_or, |
@@ -1948,7 +1969,7 @@ fn main() -> Result<()> { |
1948 | 1969 |
|
1949 | 1970 | let total_workers = cfg.gpus.len() * cfg.workers_per_gpu; |
1950 | 1971 | eprintln!( |
1951 | | - "fuzzx-diff: starting_seed=0x{:016x} out={} program_bytes={} max_iters={} control_flow={:?} blocks={}..{} insts_per_block={}..{} regs={} max_loop_iters={} max_immediate={} max_structured_depth={} emit_structured_loops={} emit_arbitrary_loops={} emit_lop3={} emit_predicated_lop3={} emit_minmax={} emit_selp={} emit_predicated_selp={} emit_sub={} emit_mul_lo={} emit_signed_lo_alu={} emit_sat_arith={} emit_packed_add={} emit_signed_packed_add={} emit_predicated_packed_add={} emit_packed_minmax={} emit_signed_packed_minmax={} emit_predicated_packed_minmax={} emit_scalar_16bit={} emit_signed_scalar_16bit={} emit_scalar_16bit_min={} emit_scalar_16bit_signed_unary={} emit_scalar_16bit_bitwise={} emit_scalar_16bit_shifts={} emit_scalar_16bit_compare={} emit_scalar_16bit_selp={} emit_predicated_scalar_16bit={} emit_mulhi={} emit_signed_mulhi={} emit_mad_hi={} emit_signed_mad_hi={} emit_bitwise_binops={} emit_or={} emit_xor={} emit_prmt={} emit_predicated_prmt={} emit_reg_prmt={} emit_predicated_reg_prmt={} emit_prmt_modes={} emit_not={} emit_clz={} emit_brev={} emit_cnot={} emit_popc={} emit_abs={} emit_special_regs={} emit_predicated_special_regs={} emit_global_loads={} emit_global_store_roundtrips={} emit_const_memory={} emit_local_memory={} emit_shared_memory={} emit_predicated_memory={} emit_vector_memory={} emit_f32_arith={} emit_f32_rounding={} emit_f32_unary={} emit_f32_cvt={} emit_f32_compare={} emit_f32_selp={} emit_signed_cmp={} emit_signed_divrem={} emit_reg_divrem={} emit_predicated_reg_divrem={} emit_predicated_divrem={} emit_funnel={} emit_reg_funnel={} emit_predicated_funnel={} emit_funnel_clamp={} emit_neg={} emit_shl={} emit_shr={} emit_signed_shr={} emit_reg_shifts={} emit_predicated_shifts={} emit_predicated_reg_shifts={} emit_bfind={} emit_signed_bfind={} emit_wide_bfind={} emit_signed_wide_bfind={} emit_predicated_bfind={} emit_predicated_wide_bfind={} emit_fns={} emit_reg_fns={} emit_predicated_fns={} emit_predicated_reg_fns={} emit_bfi={} emit_bfe={} emit_bmsk={} emit_bmsk_wrap={} emit_predicated_bitfield={} emit_reg_bitfield={} emit_predicated_reg_bitfield={} emit_wide_bfe={} emit_signed_wide_bfe={} emit_wide_bfi={} emit_predicated_wide_bitfield={} emit_reg_wide_bitfield={} emit_predicated_reg_wide_bitfield={} emit_mad24={} emit_mul24={} emit_predicated_24bit={} emit_subword_wide={} emit_signed_subword_wide={} emit_predicated_subword_wide={} emit_mul_wide={} emit_mad_wide={} emit_signed_mad_wide={} emit_predicated_mul_wide={} emit_predicated_mad_wide={} emit_wide_high_result={} emit_wide_int={} emit_wide_minmax={} emit_wide_mulhi={} emit_predicated_wide_int={} emit_wide_mad64={} emit_signed_wide_mad64={} emit_predicated_wide_mad64={} emit_wide_set={} emit_predicated_wide_set={} emit_wide_setp={} emit_wide_setp_bool={} emit_wide_selp={} emit_wide_unary={} emit_predicated_wide_unary={} emit_wide_shifts={} emit_wide_reg_shifts={} emit_predicated_wide_shifts={} emit_predicated_wide_reg_shifts={} emit_wide_divrem={} emit_signed_wide_divrem={} emit_reg_wide_divrem={} emit_predicated_reg_wide_divrem={} emit_predicated_wide_divrem={} emit_wide_addc={} emit_wide_subc={} emit_predicated_wide_carry={} emit_wide_carry_chain={} emit_predicated_wide_carry_chain={} emit_addc={} emit_subc={} emit_predicated_carry={} emit_carry_chain={} emit_predicated_carry_chain={} emit_i32_boundary_immediates={} emit_dp4a={} emit_dp2a={} emit_negated_predicates={} emit_predicated_alu={} emit_predicated_unary={} emit_cvt={} emit_predicated_cvt={} emit_narrow_cvt={} emit_signed_narrow_cvt={} emit_predicated_narrow_cvt={} emit_wide_cvt={} emit_signed_wide_cvt={} emit_predicated_wide_cvt={} emit_szext={} emit_signed_szext={} emit_predicated_szext={} emit_setp_bool={} emit_setp_dual={} emit_pred_logic={} emit_predicated_mad={} emit_predicated_mad_hi={} emit_mad_carry={} emit_signed_mad_carry={} emit_predicated_mad_carry={} emit_predicated_set={} emit_sad={} emit_slct={} emit_predicated_sad={} emit_predicated_slct={} emit_predicated_dp={} emit_predicated_video={} emit_set={} emit_s32_slct={} emit_video={} emit_vsub4={} gpus={:?} workers_per_gpu={} (total={})", |
| 1972 | + "fuzzx-diff: starting_seed=0x{:016x} out={} program_bytes={} max_iters={} control_flow={:?} blocks={}..{} insts_per_block={}..{} regs={} max_loop_iters={} max_immediate={} max_structured_depth={} emit_structured_loops={} emit_arbitrary_loops={} emit_lop3={} emit_predicated_lop3={} emit_minmax={} emit_selp={} emit_predicated_selp={} emit_sub={} emit_mul_lo={} emit_signed_lo_alu={} emit_sat_arith={} emit_packed_add={} emit_signed_packed_add={} emit_predicated_packed_add={} emit_packed_minmax={} emit_signed_packed_minmax={} emit_predicated_packed_minmax={} emit_scalar_16bit={} emit_signed_scalar_16bit={} emit_scalar_16bit_min={} emit_scalar_16bit_signed_unary={} emit_scalar_16bit_bitwise={} emit_scalar_16bit_shifts={} emit_scalar_16bit_compare={} emit_scalar_16bit_selp={} emit_predicated_scalar_16bit={} emit_mulhi={} emit_signed_mulhi={} emit_mad_hi={} emit_signed_mad_hi={} emit_bitwise_binops={} emit_or={} emit_xor={} emit_prmt={} emit_predicated_prmt={} emit_reg_prmt={} emit_predicated_reg_prmt={} emit_prmt_modes={} emit_not={} emit_clz={} emit_brev={} emit_cnot={} emit_popc={} emit_abs={} emit_special_regs={} emit_predicated_special_regs={} emit_global_loads={} emit_global_store_roundtrips={} emit_const_memory={} emit_local_memory={} emit_shared_memory={} emit_predicated_memory={} emit_vector_memory={} emit_f32_arith={} emit_f32_rounding={} emit_f32_unary={} emit_f32_cvt={} emit_f32_compare={} emit_f32_selp={} emit_f64_arith={} emit_f64_compare={} emit_f64_selp={} emit_signed_cmp={} emit_signed_divrem={} emit_reg_divrem={} emit_predicated_reg_divrem={} emit_predicated_divrem={} emit_funnel={} emit_reg_funnel={} emit_predicated_funnel={} emit_funnel_clamp={} emit_neg={} emit_shl={} emit_shr={} emit_signed_shr={} emit_reg_shifts={} emit_predicated_shifts={} emit_predicated_reg_shifts={} emit_bfind={} emit_signed_bfind={} emit_wide_bfind={} emit_signed_wide_bfind={} emit_predicated_bfind={} emit_predicated_wide_bfind={} emit_fns={} emit_reg_fns={} emit_predicated_fns={} emit_predicated_reg_fns={} emit_bfi={} emit_bfe={} emit_bmsk={} emit_bmsk_wrap={} emit_predicated_bitfield={} emit_reg_bitfield={} emit_predicated_reg_bitfield={} emit_wide_bfe={} emit_signed_wide_bfe={} emit_wide_bfi={} emit_predicated_wide_bitfield={} emit_reg_wide_bitfield={} emit_predicated_reg_wide_bitfield={} emit_mad24={} emit_mul24={} emit_predicated_24bit={} emit_subword_wide={} emit_signed_subword_wide={} emit_predicated_subword_wide={} emit_mul_wide={} emit_mad_wide={} emit_signed_mad_wide={} emit_predicated_mul_wide={} emit_predicated_mad_wide={} emit_wide_high_result={} emit_wide_int={} emit_wide_minmax={} emit_wide_mulhi={} emit_predicated_wide_int={} emit_wide_mad64={} emit_signed_wide_mad64={} emit_predicated_wide_mad64={} emit_wide_set={} emit_predicated_wide_set={} emit_wide_setp={} emit_wide_setp_bool={} emit_wide_selp={} emit_wide_unary={} emit_predicated_wide_unary={} emit_wide_shifts={} emit_wide_reg_shifts={} emit_predicated_wide_shifts={} emit_predicated_wide_reg_shifts={} emit_wide_divrem={} emit_signed_wide_divrem={} emit_reg_wide_divrem={} emit_predicated_reg_wide_divrem={} emit_predicated_wide_divrem={} emit_wide_addc={} emit_wide_subc={} emit_predicated_wide_carry={} emit_wide_carry_chain={} emit_predicated_wide_carry_chain={} emit_addc={} emit_subc={} emit_predicated_carry={} emit_carry_chain={} emit_predicated_carry_chain={} emit_i32_boundary_immediates={} emit_dp4a={} emit_dp2a={} emit_negated_predicates={} emit_predicated_alu={} emit_predicated_unary={} emit_cvt={} emit_predicated_cvt={} emit_narrow_cvt={} emit_signed_narrow_cvt={} emit_predicated_narrow_cvt={} emit_wide_cvt={} emit_signed_wide_cvt={} emit_predicated_wide_cvt={} emit_szext={} emit_signed_szext={} emit_predicated_szext={} emit_setp_bool={} emit_setp_dual={} emit_pred_logic={} emit_predicated_mad={} emit_predicated_mad_hi={} emit_mad_carry={} emit_signed_mad_carry={} emit_predicated_mad_carry={} emit_predicated_set={} emit_sad={} emit_slct={} emit_predicated_sad={} emit_predicated_slct={} emit_predicated_dp={} emit_predicated_video={} emit_set={} emit_s32_slct={} emit_video={} emit_vsub4={} gpus={:?} workers_per_gpu={} (total={})", |
1952 | 1973 | cfg.starting_seed, |
1953 | 1974 | cfg.out_dir.display(), |
1954 | 1975 | cfg.program_bytes, |
@@ -2023,6 +2044,9 @@ fn main() -> Result<()> { |
2023 | 2044 | cfg.gen_config.emit_f32_cvt, |
2024 | 2045 | cfg.gen_config.emit_f32_compare, |
2025 | 2046 | cfg.gen_config.emit_f32_selp, |
| 2047 | + cfg.gen_config.emit_f64_arith, |
| 2048 | + cfg.gen_config.emit_f64_compare, |
| 2049 | + cfg.gen_config.emit_f64_selp, |
2026 | 2050 | cfg.gen_config.emit_signed_cmp, |
2027 | 2051 | cfg.gen_config.emit_signed_divrem, |
2028 | 2052 | cfg.gen_config.emit_reg_divrem, |
|
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