[Backport]: KVM 支持 SBI FWFT 扩展优化 Fwft - #380
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开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/33152471379 参数解析结果
测试完成 详细结果:
Kunit Test Result[07:49:47] Testing complete. Ran 482 tests: passed: 465, skipped: 17
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测试完成 详细结果:
Kunit Test Result[07:49:47] Testing complete. Ran 482 tests: passed: 465, skipped: 17
Kernel Build Result
Check Patch Result
LAVA Check (qemu)
result: Lava check done!
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unicornx
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1st review:
72528cc selftests: KVM: riscv: get-reg-list: Add missing ISA extension names to the lookup table
- commit 的标题不符合 upsteram 的习惯,查看对 tools/testing/selftests/kvm/riscv/get-reg-list.c 的修改的补丁一般标题前缀是:"KVM: riscv: selftests:"
- 请研究一下是否可以 backport "b26e70d72d12 KVM: riscv: selftests: Use register subtypes" 这个上游补丁?进而将 tools/testing/selftests/kvm/riscv/get-reg-list.c 进一步和上游的改进保持一致(统一到
isa_ext_single_id_to_str中),否则针对isa_ext_id_to_str这个函数,以后差别越来越大。进一步地,是否可以将主线上从 6a53a5f 往上直到 b26e70d 的补丁都拿过来,我粗略看了一下,都是局限于 get-reg-list.c 的并且涉及该文件测试的一些通用代码框架优化的,是否可以尽量拿过来,这样 rvck 的 get-reg-list.c 的代码和主线的代码的区别将只是在扩展支持的差别上,而不会出现一些框架代码的区别。
e973e89 RISC-V: KVM: selftests: Treat SBI ext regs like ISA ext regs
[Some parts of the previous patch were inadvertently missed. Fix them in this patch.]
你的意思是说 “之前的补丁中有些部分被意外遗漏了。本次补丁修复了这些问题。”?我理解这个描述是错误的,我检查了一下,你这次 backport 这个补丁中不是补充了遗漏的补丁,而是放弃了一些以前补丁中提前合入的部分。 譬如:tools/testing/selftests/kvm/include/kvm_util_base.h 中的
+ int feature_type;以及 tools/testing/selftests/kvm/riscv/get-reg-list.c 中的
+enum {
+ VCPU_FEATURE_ISA_EXT = 0,
+ VCPU_FEATURE_SBI_EXT,
+};和
@@ -593,16 +630,6 @@ static __u64 base_regs[] = {
KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_TIMER | KVM_REG_RISCV_TIMER_REG(time),
KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_TIMER | KVM_REG_RISCV_TIMER_REG(compare),
KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_TIMER | KVM_REG_RISCV_TIMER_REG(state),
- KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_V01,
- KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_TIME,
- KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_IPI,
- KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_RFENCE,
- KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_SRST,
- KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_HSM,
- KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_PMU,
- KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_EXPERIMENTAL,
- KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_VENDOR,
- KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_DBCN,
};
/*
@@ -613,6 +640,17 @@ static __u64 base_skips_set[] = {
KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_TIMER | KVM_REG_RISCV_TIMER_REG(state),
};
+static __u64 sbi_base_regs[] = {
+ KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_V01,
+ KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_TIME,
+ KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_IPI,
+ KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_RFENCE,
+ KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_SRST,
+ KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_HSM,
+ KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_EXPERIMENTAL,
+ KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_VENDOR,
+};
+
static __u64 zicbom_regs[] = {
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(zicbom_block_size),
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOM,
@@ -716,6 +754,9 @@ static __u64 fp_d_regs[] = {
#define SUBLIST_BASE \
{"base", .regs = base_regs, .regs_n = ARRAY_SIZE(base_regs), \
.skips_set = base_skips_set, .skips_set_n = ARRAY_SIZE(base_skips_set),}
+#define SUBLIST_SBI_BASE \
+ {"sbi-base", .feature_type = VCPU_FEATURE_SBI_EXT, .feature = KVM_RISCV_SBI_EXT_V01, \
+ .regs = sbi_base_regs, .regs_n = ARRAY_SIZE(sbi_base_regs),}
#define SUBLIST_ZICBOM \
{"zicbom", .feature = KVM_RISCV_ISA_EXT_ZICBOM, .regs = zicbom_regs, .regs_n = ARRAY_SIZE(zicbom_regs),}
#define SUBLIST_ZICBOZ \
@@ -750,6 +791,26 @@ static struct vcpu_reg_list config_##ext = { \
}, \
} \
+#define KVM_SBI_EXT_SIMPLE_CONFIG(ext, extu) \
+static __u64 regs_sbi_##ext[] = { \
+ KVM_REG_RISCV | KVM_REG_SIZE_ULONG | \
+ KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | \
+ KVM_RISCV_SBI_EXT_##extu, \
+}; \
+static struct vcpu_reg_list config_sbi_##ext = { \
+ .sublists = { \
+ SUBLIST_BASE, \
+ { \
+ .name = "sbi-"#ext, \
+ .feature_type = VCPU_FEATURE_SBI_EXT, \
+ .feature = KVM_RISCV_SBI_EXT_##extu, \
+ .regs = regs_sbi_##ext, \
+ .regs_n = ARRAY_SIZE(regs_sbi_##ext), \
+ }, \
+ {0}, \
+ }, \
+} \
+
#define KVM_ISA_EXT_SUBLIST_CONFIG(ext, extu) \
static struct vcpu_reg_list config_##ext = { \
.sublists = { \
@@ -759,8 +820,21 @@ static struct vcpu_reg_list config_##ext = { \
}, \
} \
+#define KVM_SBI_EXT_SUBLIST_CONFIG(ext, extu) \
+static struct vcpu_reg_list config_sbi_##ext = { \
+ .sublists = { \
+ SUBLIST_BASE, \
+ SUBLIST_SBI_##extu, \
+ {0}, \
+ }, \
+} \
+
/* Note: The below list is alphabetically sorted. */
+KVM_SBI_EXT_SUBLIST_CONFIG(base, BASE);
+KVM_SBI_EXT_SIMPLE_CONFIG(pmu, PMU);
+KVM_SBI_EXT_SIMPLE_CONFIG(dbcn, DBCN);
+
KVM_ISA_EXT_SUBLIST_CONFIG(aia, AIA);
KVM_ISA_EXT_SUBLIST_CONFIG(fp_f, FP_F);
KVM_ISA_EXT_SUBLIST_CONFIG(fp_d, FP_D);
@@ -783,6 +857,9 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zihintpause, ZIHINTPAUSE);
KVM_ISA_EXT_SIMPLE_CONFIG(zihpm, ZIHPM);
struct vcpu_reg_list *vcpu_configs[] = {
+ &config_sbi_base,
+ &config_sbi_pmu,
+ &config_sbi_dbcn,
&config_aia,
&config_fp_f,
&config_fp_d,这些你这次没有合入,原因是在 rvck 中合入 "RISC-V: KVM: selftests: Add get-reg-list test for STA registers" 这个补丁时,人为改动了上游的补丁,提前合入这部分内容。
另外,tools/testing/selftests/kvm/riscv/get-reg-list.c 中的下面这部分没有合入
@@ -53,6 +58,21 @@ bool filter_reg(__u64 reg)
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZIFENCEI:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZIHINTPAUSE:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZIHPM:
+ /*
+ * Like ISA_EXT registers, SBI_EXT registers are only visible when the
+ * host supports them and disabling them does not affect the visibility
+ * of the SBI_EXT register itself.
+ */
+ case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_V01:
+ case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_TIME:
+ case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_IPI:
+ case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_RFENCE:
+ case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_SRST:
+ case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_HSM:
+ case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_PMU:
+ case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_DBCN:
+ case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_EXPERIMENTAL:
+ case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_VENDOR:
return true;
/* AIA registers are always available when Ssaia can't be disabled */
case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(siselect):我查了一下,发现是在 rvck 中合入 "KVM: riscv: selftests: Add Sscofpmf to get-reg-list test" 这个补丁时,人为改动了上游的补丁,提前合入这部分。
请修改补丁中的描述,最好将我上面列出的那些提前合入的补丁的 title 也记录一下。不用记录它们的 commit hashcode,因为 rvck-6.6 分支每个月会做 rebase,所有 commit 的 hashcode 都会变,但 title 不变。
BTW:还是要强调一下以后 backport 时除非因为 6.6 的 rvck 不支持更新的补丁的代码需要做 fix 外,不能私自 pick 上游补丁代码,否则就会造成目前我们看到的这种状态,增加维护困难。
72500d3 KVM: riscv: selftests: Change vcpu_has_ext to a common function
[Due to differences in the surrounding context, adapt the patch accordingly.]
"differences in the surrounding context", 这个具体是什么意思?我认为这个描述也是不准确的。我研究了一下,感觉是如下原因。
rvck 在今年 2 月初通过 PR 218 backport 过一个同名的补丁 "KVM: riscv: selftests: Change vcpu_has_ext to a common function"。但合入的不全,原上游补丁中 get-reg-list.c 中对 vcpu_has_ext 的清理和替换没有合入 (具体原因未知),而你这次对 get-reg-list.c 的改动相当于是补齐了上次 backport 的同名补丁。
所以为了避免 rvck-6.6 中出现同名的两个 commit (RVCK 无法通过 commit hashcode 唯一区分 patch,只能通过 title,具体原因上面解释过了),这次的 commit 应该是对上次的 backport 的一次 bugfix,而非 backport 以及 adapt。我建议这次这个补丁的 title 和 commit message 应该写成下面这样:
KVM: riscv: selftests: complete backport for change vcpu_has_ext
mainline inclusion
category: bugfix
bugzilla: https://github.com/RVCK-Project/rvck/issues/357
--------------------------------
When backporting "KVM: riscv: selftests: Change vcpu_has_ext to a common function,"
via [PR 218][1], the merge was incomplete; the cleanup and replacement of
`vcpu_has_ext` in `get-reg-list.c` from the original upstream patch were not merged.
This patch completes the patch.
[1[: https://github.com/RVCK-Project/rvck/pull/218 link
Fixes: backport: ("KVM: riscv: selftests: Change vcpu_has_ext to a common function")
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
675f6d7 KVM: selftests: Allow tagging protected memory in guest page tables
为何要引入这个补丁,看上去这个补丁当时上游引入是为了 x86_64, 但连带改动了 common 的代码导致多个 ARCH 需要配合适配,而在 riscv(包括除了 x86_64 之外的其他 ARCH) 侧其实并无实质作用。请再评估一下 backport 它的原因。目前 rvck 的新的要求是要考虑对多架构的影响(主要是 x86_64 和 aarch64),所以此类补丁的引入需要慎重。
d760463 KVM: selftests: Return a value from vcpu_get_reg() instead of using an out-param
[Some adaptations were made in this patch to account for differences in the code context.]
“account for differences in the code context” 这种表述太模糊了,对阅读补丁的人益处不大。我看了一下发现之所以原补丁中有些部分没有合入,其原因就是因为 6.13 和 6.6 之间的差距导致原补丁中有些文件(tools/testing/selftests/kvm/aarch64/no-vgic-v3.c、tools/testing/selftests/kvm/aarch64/set_id_regs.c、tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c)或者函数 (host_test_system_off2) 在 6.6 基线中还不存在,所以对这些文件的相关改动无法合入,而且从 rvck 的角度来说也没有必要将这些文件补齐。请修改 commit message,直接说明 backport 中不合入的原因即可。
这个补丁涉及多 ARCH,但感觉修改了一个函数接口,没有逻辑上的修改,所以我理解合入非 riscv ARCH 部分是没有问题的,而且局限在 tools/testing/selftests/kvm,不影响内核本身
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针对这条 comment 补充一下:我发现该补丁中针对 diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/tools/testing/selftests/kvm/include/riscv/processor.h
index 366a560b6469..932bbcbdbd87 100644
--- a/tools/testing/selftests/kvm/include/riscv/processor.h
+++ b/tools/testing/selftests/kvm/include/riscv/processor.h
@@ -60,6 +60,8 @@ static inline bool __vcpu_has_sbi_ext(struct kvm_vcpu *vcpu, uint64_t sbi_ext)
return __vcpu_has_ext(vcpu, RISCV_SBI_EXT_REG(sbi_ext));
}
+bool __vcpu_has_ext(struct kvm_vcpu *vcpu, uint64_t ext);
+
struct ex_regs {
unsigned long ra;
unsigned long sp;这部分应该不 backport,否则导致 patch 后 |
mainline inclusion from Linux 6.6-rc6 commit 4d554e0 category: feature bugzilla: RVCK-Project#357 -------------------------------- We have a new senvcfg register in the general CSR ONE_REG interface so let us add it to get-reg-list test. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.6-rc6 commit e1a8db0 category: feature bugzilla: RVCK-Project#357 [Because the patch "KVM: riscv: selftests: Generate ISA extension reg_list using macros" (PR 214[1]) was merged early and incorporates portions of the SATEEMSTN selftest, the integration of this patch as submitted in this commit is incomplete relative to the upstream version.] -------------------------------- We have a new smstateen registers as separate sub-type of CSR ONE_REG interface so let us add these registers to get-reg-list test. [1]: RVCK-Project#214 Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.6-rc6 commit 2b3f2b7 category: feature bugzilla: RVCK-Project#357 [Because the patch "KVM: riscv: selftests: Generate ISA extension reg_list using macros" (PR 214[1]) was merged early and incorporates portions of the ZICOND selftest, the integration of this patch as submitted in this commit is incomplete relative to the upstream version.] -------------------------------- We have a new conditional operations related ISA extensions so let us add these extensions to get-reg-list test. [1]: RVCK-Project#214 Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.7-rc6 commit 3279f52 category: feature bugzilla: RVCK-Project#357 -------------------------------- print_reg() will print everything it knows when it encounters a register ID it's unfamiliar with in the default cases of its decoding switches. Fix several issues with these (until now, never tested) paths; missing newlines in printfs, missing complement operator in mask, and missing return in order to avoid continuing to decode. Fixes: 62d0c45 ("KVM: riscv: selftests: get-reg-list print_reg should never fail") Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Haibo Xu <haibo1.xu@intel.com> Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.7-rc8 commit 7602730 category: feature bugzilla: RVCK-Project#357 -------------------------------- These registers are no longer getting added to get-reg-list. We keep sbi_ext_multi_id_to_str() for printing, even though we don't expect it to normally be used, because it may be useful for debug. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.7-rc8 commit b26e70d category: feature bugzilla: RVCK-Project#357 [Because the patch "KVM: riscv: selftests: Add Sscofpmf to get-reg-list test" (PR 218[1]) was merged early and incorporates portions of the selftest patch, the integration of this patch as submitted in this commit is incomplete relative to the upstream version.] -------------------------------- Always use register subtypes in the get-reg-list test when registers have them. The only registers neglecting to do so were ISA extension registers. While we don't really need to use KVM_REG_RISCV_ISA_SINGLE (since it's zero), the main purpose is to avoid confusion and to self-document the tests. Also add print support for the multi registers like SBI extensions have, even though they're only used for debugging. [1]: RVCK-Project#218 Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Haibo Xu <haibo1.xu@intel.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.7-rc8 commit bdf6aa3 category: feature bugzilla: RVCK-Project#357 [Because the patch "RISC-V: KVM: selftests: Add get-reg-list test for STA registers" (PR 214[1]) and "KVM: riscv: selftests: Add Sscofpmf to get-reg-list test"(PR 218[2]) was merged early and incorporates portions of the selftest patch, the integration of this patch as submitted in this commit is incomplete relative to the upstream version.] -------------------------------- SBI extension registers may not be present and indeed when running on a platform without sscofpmf the PMU SBI extension is not. Move the SBI extension registers from the base set of registers to the filter list. Individual configs should test for any that may or may not be present separately. Since the PMU extension may disappear and the DBCN extension is only present in later kernels, separate them from the rest into their own configs. The rest are lumped together into the same config. [1]: RVCK-Project#214 [2]: RVCK-Project#218 Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.8-rc1 commit ac39614 category: feature bugzilla: RVCK-Project#357 [Because the previously submitted patch "KVM: riscv: selftests: Add Sscofpmf to get-reg-list test" (PR 218[1]) incorrectly included portions of this patch, the integration of this patch as submitted in this commit is incomplete relative to the upstream version.] -------------------------------- The KVM RISC-V allows Zbc extension for Guest/VM so let us add this extension to get-reg-list test. [1]: RVCK-Project#218 Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.8-rc1 commit 14d70de category: feature bugzilla: RVCK-Project#357 [Because the previously submitted patch "KVM: riscv: selftests: Add Sscofpmf to get-reg-list test" (PR 218[1]) incorrectly included portions of this patch, the integration of this patch as submitted in this commit is incomplete relative to the upstream version.] -------------------------------- The KVM RISC-V allows scaler crypto extensions for Guest/VM so let us add these extensions to get-reg-list test. This includes extensions Zbkb, Zbkc, Zbkx, Zknd, Zkne, Zknh, Zkr, Zksed, Zksh, and Zkt. [1]: RVCK-Project#218 Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.8-rc1 commit 2ddf790 category: feature bugzilla: RVCK-Project#357 [Because the previously submitted patch "KVM: riscv: selftests: Add Sscofpmf to get-reg-list test" (PR 218[1]) incorrectly included portions of this patch, the integration of this patch as submitted in this commit is incomplete relative to the upstream version.] -------------------------------- The KVM RISC-V allows vector crypto extensions for Guest/VM so let us add these extensions to get-reg-list test. This includes extensions Zvbb, Zvbc, Zvkb, Zvkg, Zvkned, Zvknha, Zvknhb, Zvksed, Zvksh, and Zvkt. [1]: RVCK-Project#218 Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.8-rc1 commit 496ee21 category: feature bugzilla: RVCK-Project#357 [Because the previously submitted patch "KVM: riscv: selftests: Add Sscofpmf to get-reg-list test" (PR 218[1]) incorrectly included portions of this patch, the integration of this patch as submitted in this commit is incomplete relative to the upstream version.] -------------------------------- The KVM RISC-V allows Zfh[min] extensions for Guest/VM so let us add these extensions to get-reg-list test. [1]: RVCK-Project#218 Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.8-rc1 commit 1a3bc50 category: feature bugzilla: RVCK-Project#357 [Because the previously submitted patch "KVM: riscv: selftests: Add Sscofpmf to get-reg-list test" (PR 218[1]) incorrectly included portions of this patch, the integration of this patch as submitted in this commit is incomplete relative to the upstream version.] -------------------------------- The KVM RISC-V allows Zihintntl extension for Guest/VM so let us add this extension to get-reg-list test. [1]: RVCK-Project#218 Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.8-rc1 commit 1216fdd category: feature bugzilla: RVCK-Project#357 [Because the previously submitted patch "KVM: riscv: selftests: Add Sscofpmf to get-reg-list test" (PR 218[1]) incorrectly included portions of this patch, the integration of this patch as submitted in this commit is incomplete relative to the upstream version.] -------------------------------- The KVM RISC-V allows Zvfh[min] extensions for Guest/VM so let us add these extensions to get-reg-list test. [1]: RVCK-Project#218 Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.8-rc1 commit 4d0e8f9 category: feature bugzilla: RVCK-Project#357 [Because the previously submitted patch "KVM: riscv: selftests: Add Sscofpmf to get-reg-list test" (PR 218[1]) incorrectly included portions of this patch, the integration of this patch as submitted in this commit is incomplete relative to the upstream version.] -------------------------------- The KVM RISC-V allows Zfa extension for Guest/VM so let us add this extension to get-reg-list test. [1]: RVCK-Project#218 Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.8-rc1 commit 93e43e5 category: feature bugzilla: RVCK-Project#357 -------------------------------- TEST_* functions append their own newline. Remove newlines from TEST_* callsites to avoid extra newlines in output. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20231206170241.82801-10-ajones@ventanamicro.com Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
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开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/33634758041 参数解析结果
测试完成 详细结果:
Kunit Test Result[13:24:10] Testing complete. Ran 482 tests: passed: 465, skipped: 17
Kernel Build Result
Check Patch Result
LAVA Check (qemu)
result: Lava check done!
测试完成 详细结果:
Kunit Test Result[13:24:10] Testing complete. Ran 482 tests: passed: 465, skipped: 17
Kernel Build Result
Check Patch Result
LAVA Check (qemu)
result: Lava check done!
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mainline inclusion from Linux 6.8 commit 812806b category: feature bugzilla: RVCK-Project#357 -------------------------------- When backporting "KVM: riscv: selftests: Change vcpu_has_ext to a common function," via [PR 218][1], the merge was incomplete; the cleanup and replacement of `vcpu_has_ext` in `get-reg-list.c` from the original upstream patch were not merged. This patch completes the patch. [1]: RVCK-Project#218 Fixes: backport: ("KVM: riscv: selftests: Change vcpu_has_ext to a common function") Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.10-rc6 commit dd4a799 category: feature bugzilla: RVCK-Project#357 -------------------------------- Fix compile error introduced by commit d27c34a ("KVM: riscv: selftests: Add some Zc* extensions to get-reg-list test"). These 4 lines should be end with ";". Fixes: d27c34a ("KVM: riscv: selftests: Add some Zc* extensions to get-reg-list test") Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Reviewed-by: Clément Léger <cleger@rivosinc.com> Link: https://lore.kernel.org/r/20240726084931.28924-5-yongxuan.wang@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
…test mainline inclusion from Linux 6.13-rc1 commit c74bfe4 category: feature bugzilla: RVCK-Project#357 -------------------------------- Update the get-reg-list test to test the Svade and Svadu Extensions are available for guest OS. Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Link: https://lore.kernel.org/r/20240726084931.28924-6-yongxuan.wang@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
…test mainline inclusion from Linux 6.13-rc6 commit 144dfe4 category: feature bugzilla: RVCK-Project#357 -------------------------------- The KVM RISC-V allows Svvptc/Zabha/Ziccrse extensions for Guest/VM so add them to get-reg-list test. Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Link: https://lore.kernel.org/r/35163f0443993a942e0a021c6006bc5d2f0f5d5f.1732854096.git.zhouquan@iscas.ac.cn Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.14 commit 7a9827e category: feature bugzilla: RVCK-Project#357 -------------------------------- The KVM RISC-V allows Zaamo/Zalrsc extensions for Guest/VM so add these extensions to get-reg-list test. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20240619153913.867263-6-cleger@rivosinc.com Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.17-rc7 commit b4ab605 category: feature bugzilla: RVCK-Project#357 -------------------------------- The KVM RISC-V allows Zfbfmin/Zvfbfmin/Zvfbfwma extensions for Guest/VM so add them to get-reg-list test. Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com> Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com> Link: https://lore.kernel.org/r/40e52ff7053401a2fcb206e75f45ebc8557fc28b.1754646071.git.zhouquan@iscas.ac.cn Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.17-rc7 commit e212d92 category: feature bugzilla: RVCK-Project#357 -------------------------------- The KVM RISC-V allows Zcmop extension for Guest/VM so add this extension to get-reg-list test. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Acked-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20240619113529.676940-17-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
The KVM RISC-V allows Zalasr extensions for Guest/VM so add this extension to get-reg-list test. Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20251020042904.32096-1-luxu.kernel@bytedance.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.17-rc7 commit 7826c8f category: feature bugzilla: RVCK-Project#357 -------------------------------- The Smnpm extension requires special handling because the guest ISA extension maps to a different extension (Ssnpm) on the host side. commit 1851e78 ("RISC-V: KVM: Allow Smnpm and Ssnpm extensions for guests") missed that the vcpu->arch.isa bit is based only on the host extension, so currently both KVM_RISCV_ISA_EXT_{SMNPM,SSNPM} map to vcpu->arch.isa[RISCV_ISA_EXT_SSNPM]. This does not cause any problems for the guest, because both extensions are force-enabled anyway when the host supports Ssnpm, but prevents checking for (guest) Smnpm in the SBI FWFT logic. Redefine kvm_isa_ext_arr to look up the guest extension, since only the guest -> host mapping is unambiguous. Factor out the logic for checking for host support of an extension, so this special case only needs to be handled in one place, and be explicit about which variables hold a host vs a guest ISA extension. Fixes: 1851e78 ("RISC-V: KVM: Allow Smnpm and Ssnpm extensions for guests") Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20250111004702.2813013-2-samuel.holland@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.17-rc7 commit 6f576fc category: feature bugzilla: RVCK-Project#357 -------------------------------- Pointer masking is controlled through a WARL field in henvcfg. Expose the feature only if at least one PMLEN value is supported for VS-mode. Allow the VMM to block access to the feature by disabling the Smnpm ISA extension in the guest. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Link: https://lore.kernel.org/r/20250111004702.2813013-3-samuel.holland@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.17-rc6 commit 83df1d6 category: feature bugzilla: RVCK-Project#357 -------------------------------- The hedeleg may be updated by ONE_REG interface before the VCPU is run at least once hence set the initial value of hedeleg in kvm_arch_vcpu_create() instead of kvm_riscv_vcpu_setup_config(). Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com> Link: https://lore.kernel.org/r/20250823155947.1354229-2-apatel@ventanamicro.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.17-rc6 commit a6250b1 category: feature bugzilla: RVCK-Project#357 -------------------------------- The SBI FWFT feature values must be reset upon VCPU reset so introduce feature specific reset callback for this purpose. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com> Link: https://lore.kernel.org/r/20250823155947.1354229-3-apatel@ventanamicro.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.17-rc6 commit 699a53a category: feature bugzilla: RVCK-Project#357 -------------------------------- SBI extensions can have per-VCPU state which needs to be saved/restored through ONE_REG interface for Guest/VM migration. Introduce optional ONE_REG callbacks for SBI extensions so that ONE_REG implementation for an SBI extenion is part of the extension sources. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Link: https://lore.kernel.org/r/20250823155947.1354229-4-apatel@ventanamicro.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.17-rc6 commit 85e7850 category: feature bugzilla: RVCK-Project#357 -------------------------------- The ONE_REG handling of SBI extension enable/disable registers and SBI extension state registers is already under SBI implementation. On similar lines, let's move copy_sbi_ext_reg_indices() under SBI implementation. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Link: https://lore.kernel.org/r/20250823155947.1354229-5-apatel@ventanamicro.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.17-rc6 commit 48d6710 category: feature bugzilla: RVCK-Project#357 -------------------------------- The KVM user-space needs a way to save/restore the state of SBI FWFT features so implement SBI extension ONE_REG callbacks. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Link: https://lore.kernel.org/r/20250823155947.1354229-6-apatel@ventanamicro.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.17-rc6 commit 5c6d333 category: feature bugzilla: RVCK-Project#357 -------------------------------- KVM RISC-V now supports SBI FWFT, so add it to the get-reg-list test. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Link: https://lore.kernel.org/r/20250823155947.1354229-7-apatel@ventanamicro.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 7.1-rc7 commit 63224b0 category: feature bugzilla: RVCK-Project#357 -------------------------------- Mark the vCPU CSRs as dirty after successfully setting an FWFT feature value. FWFT features may modify CSRs (e.g., pointer masking modifies henvcfg.PMM), and failing to mark them dirty can lead to the guest observing stale CSR state after vCPU scheduling or migration. Fixes: 1323a5c ("KVM: riscv: Skip CSR restore if VCPU is reloaded on the same core") Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260601-kvm-get_reg_list-v2-v5-1-415d08a2813b@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 7.1-rc7 commit 86957e5 category: feature bugzilla: RVCK-Project#357 -------------------------------- Add an optional init() callback to separate one-time hardware probing from runtime availability checks. For pointer masking, this allows probing supported PMM lengths during initialization while checking ISA extension availability at runtime. Fix try_to_set_pmm() to restore the previous HENVCFG.PMM value after probing, preventing side effects from hardware detection. Add preemption protection to ensure CSR probe sequences complete atomically on the same CPU. Fixes: 6f576fc ("RISC-V: KVM: Add support for SBI_FWFT_POINTER_MASKING_PMLEN") Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260601-kvm-get_reg_list-v2-v5-2-415d08a2813b@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
…sion changes mainline inclusion from Linux 7.1-rc7 commit e659112 category: feature bugzilla: RVCK-Project#357 -------------------------------- Fix a bug where FWFT features could be incorrectly exposed to guests after userspace disables their dependent ISA extensions at runtime. The 'supported' field in kvm_sbi_fwft_config was set once during vCPU initialization based on the initial hardware/extension availability. However, when userspace subsequently disables ISA extensions via the KVM ONE_REG interface, the 'supported' field was not updated. This caused the following issues: 1. FWFT features would remain visible and accessible to guests even after their prerequisite ISA extensions were disabled 2. Guests could configure FWFT features that depend on disabled extensions, leading to undefined behavior 3. The static 'supported' flag and the dynamic supported() callback could disagree about feature availability The fix introduces a two-layer checking mechanism: 1. Add an optional init() callback to the kvm_sbi_fwft_feature structure for features that require hardware probing during initialization. This separates the one-time hardware detection logic from the runtime availability check. 2. Add runtime checks in all FWFT-related functions that call feature->supported(vcpu) if the callback exists. This ensures feature availability is re-evaluated based on the current ISA extension state. This approach maintains the cached 'supported' field for initialization- time decisions while ensuring runtime availability is always determined by the current vCPU configuration, not initialization-time snapshots. Fixes: 6b72fd1 ("RISC-V: KVM: add support for FWFT SBI extension") Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260601-kvm-get_reg_list-v2-v5-3-415d08a2813b@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
…n out-param mainline inclusion from Linux 6.13-rc4 commit 09bb926 category: feature bugzilla: RVCK-Project#357 [Due to the 6.6 baseline lacking some files and functions from the original patch (e.g., host_test_system_off2), the relevant changes are not merged, as they do not affect rvck functionality.] -------------------------------- Return a uint64_t from vcpu_get_reg() instead of having the caller provide a pointer to storage, as none of the vcpu_get_reg() usage in KVM selftests accesses a register larger than 64 bits, and vcpu_set_reg() only accepts a 64-bit value. If a use case comes along that needs to get a register that is larger than 64 bits, then a utility can be added to assert success and take a void pointer, but until then, forcing an out param yields ugly code and prevents feeding the output of vcpu_get_reg() into vcpu_set_reg(). Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Link: https://lore.kernel.org/r/20241128005547.4077116-3-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.15 commit e23bb06 category: feature bugzilla: RVCK-Project#357 -------------------------------- The current exeception register structure in selftests are missing few registers (e.g stval). Instead of adding it manually, change the ex_regs to align with pt_regs to make it future proof. Suggested-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20250430-kvm_selftest_improve-v3-1-eea270ff080b@rivosinc.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.15 commit 3608b17 category: feature bugzilla: RVCK-Project#357 -------------------------------- Currently, the sbi_pmu_test continues if the exception type is illegal instruction because access to hpmcounter will generate that. However illegal instruction exception may occur due to the other reasons which should result in test assertion. Use the stval to decode the exact type of instructions and which csrs are being accessed if it is csr access instructions. Assert in all cases except if it is a csr access instructions that access valid PMU related registers. Take this opportunity to remove the CSR_CYCLEH reference as the test is compiled for RV64 only. Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20250430-kvm_selftest_improve-v3-2-eea270ff080b@rivosinc.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 6.15 commit f80e9cc category: feature bugzilla: RVCK-Project#357 -------------------------------- Add vector related tests with the ISA extension standard template. However, the vector registers are bit tricky as the register length is variable based on vlenb value of the system. That's why the macros are defined with a default and overidden with actual value at runtime. Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20250430-kvm_selftest_improve-v3-3-eea270ff080b@rivosinc.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
mainline inclusion from Linux 7.1-rc7 commit 85fc710 category: feature bugzilla: RVCK-Project#357 -------------------------------- Refactor the get-reg-list test to use unified sublist macros for ISA and SBI extensions, eliminating code duplication and improving maintainability. Previously, each extension had its own hand-coded sublist definition (e.g., SUBLIST_ZICBOM, SUBLIST_AIA, etc.) and the config structures repeated the same pattern. This made the code verbose and error-prone. Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260601-kvm-get_reg_list-v2-v5-4-415d08a2813b@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
…sublists mainline inclusion from Linux 7.1-rc7 commit 64e50ab category: feature bugzilla: RVCK-Project#357 -------------------------------- Divide the monolithic SBI FWFT (Firmware Features) register list into separate sublists, each testing a specific FWFT feature independently with proper dependency checking. Previously, all FWFT features were tested together in a single sublist. This caused issues because: 1. Not all FWFT features are available on all platforms 2. Some features depend on specific ISA extensions (e.g., pointer_masking requires Smnpm) 3. Tests would fail if any single feature was unavailable Add the feature-specific SBI FWFT sublists with the following improvements: - Add check_fwft_feature() helper to verify FWFT feature availability at runtime - Update filter_reg() to handle per-feature FWFT register filtering Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260601-kvm-get_reg_list-v2-v5-5-415d08a2813b@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
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开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/33641401737 参数解析结果
测试完成 详细结果:
Kunit Test Result[14:24:51] Testing complete. Ran 482 tests: passed: 465, skipped: 17
Kernel Build Result
Check Patch Result
LAVA Check (qemu)
result: Lava check done!
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unicornx
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2nd review:
针对 tools/testing/selftests/kvm/riscv/get-reg-list.c 和上游对齐的改动
我看你第二版改动中增加了很多补丁,主要目的应该是将 tools/testing/selftests/kvm/riscv/get-reg-list.c 和上游尽可能对齐。存在下面几个问题,建议在 pr 中修改一下。
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在 github 的 PR 中补充一下这个改动的说明,同时说一下,目前这个文件对齐到上游的哪个 commit,我看了一下,应该是 “64e50ab0ed84 KVM: riscv: selftests: Split SBI FWFT into separate feature-specific sublists”,请 double-check。
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摘取补丁时请尽量将和这个文件相关的补丁放在一起,并且按照上游合入的顺序 pick。我看你现在对该文件的补丁和其他修改的补丁有一定程度的混杂,另外还有几个补丁的顺序也和上游的补丁不一样,请尽量调整一下,方便以后维护,特别是以后采用
git log --oneline tools/testing/selftests/kvm/riscv/get-reg-list.c命令查看时和上游的顺序方便比较。特别地,有关顺序,我看到以下几个补丁的顺序和上游顺序有差别,列出来方便你再查看一下
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为何漏掉了 “d1c5620781d5 KVM: riscv: selftests: Add SBI MPXY extension to get-reg-list”,是否可以补上?
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对于另外一个没有 pick 的 “26f8453288d4 KVM: selftests: Use u64 instead of uint64_t” 我理解你没有 pick 是因为涉及 multi-arch 文件改动较多且没有实质性功能修改,所以你没有 pick,是这样吗?如果确认,请同样在 github 的 PR 中补充说明一下不 pick 的原因,以备忘。
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另外,对
get-reg-list.c,我拿 380 改动后的版本和主线截至 64e50ab 的版本比了一下,除了漏掉的 MPXY 部分,u64 替换 uint64_t,以及一些代码行颠倒顺序(可能是 pick 顺序错乱导致,但没有坏影响)之外,我发现有个错误需要改正一下。具体是sbi_base_regs中相比主线多了一行KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_DBCN,,我定位了一下,感觉是早先 backport “RISC-V: KVM: selftests: Add get-reg-list test for STA registers” 这个补丁时引入的一个 bug。而这个 DBCN 在上游的 "bdf6aa328f13 RISC-V: KVM: selftests: Treat SBI ext regs like ISA ext regs" 中引入 sbi_base_regs 时实际上是移除了,而这次你 backport bdf6aa3 这个补丁时因为考虑到前期 backport 的冲突完整舍弃了 上游 bdf6aa3 的相关内容导致这个问题,我建议你在 backport bdf6aa3 时 fix 这个问题,并在 commit message 中强调说明一下。Anyway,过去 backport 这个文件改动时的确有些乱,辛苦你了。 -
我建议在对齐
get-reg-list.c补丁的基础上,将我上面拿 380 改动后的版本和主线截至 64e50ab 的版本比对中发现的一些涉及代码行颠倒顺序的问题单独提一个 patch fix 一下。这样以后再 backport 这个文件时会好看很多,现在会看到由于这些乱序导致的 diff 中的难看的问题。
330f434 KVM: riscv: selftests: Add senvcfg register to get-reg-list test
应该是 v6.7-rc1 进的主线,不是 from Linux 6.6-rc6,再说 rvck 目前本身也是基于 6.6.x 的,如果是 6.6-rc6,那就不存在 backport 了
3eae978 KVM: riscv: selftests: Use register subtypes
这个为啥放在签名区?我建议放在 “------” 之前和 backport 说明在一起比较好,从 upstream backport 来的 commit 的 SOB 区我建议除了在最后 append 自己的 SOB 外,其他部分就不要动了吧。
这个问题在其他 patch 中也存在,能否一起改一下?
ea3b0ed RISC-V: KVM: selftests: Add Zalasr extensions to get-reg-list test
commit message 中缺少 backport 的声明部分,即 “----” 上面的内容。
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@fangyu0809 这个改动涉及的部分我看你们以前也改动过,请一起 review 一下,谢谢 |
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@uestc-gr 貌似 rvck-6.6 分支升级了,请下次修改时记得 rebase 一下。 |
fixed: #357
这一批补丁集中在 RISC-V KVM 的 SBI FWFT 扩展与 ONE_REG 接口支持,涵盖了功能修复、接口实现、自测增强以及特性管理。通过这些改动,KVM 在 RISC-V 平台上实现了更完善的 固件特性控制,提升了 用户态可控性、测试覆盖率 和 性能优化。
使用内核测试工具get-reg-list进行测试,测试结果如下
/home # ./get-reg-list --config=sbi-fwft_misaligned_deleg
sbi-fwft_misaligned_deleg: PASS
/home # ./get-reg-list --config=smnpm+sbi-fwft_pointer_masking
smnpm+sbi-fwft_pointer_masking: PASS