Does NEMU support rvv?

[learnlearnknowledge]

We downloaded the latested NEMU branch, run make menuconfig and enable the rvv support option, but when run spec06 compiled with riscv gcc 15.1, NEMU raise exception, and show the PC value, after disassemble the spec 06 elf, show rvv code in this PC, so do you know if NEMU support rvv? If so, how to let NEMU support rvv extension, thank you very much

[cebarobot]

Hi, NEMU does support RVV.

Your description is not detailed enought to let us know what the problem is. You may provide more infomations:

• Everything you did before you encountered the problem?
• The Log that NEMU printed.

Also, there are some points you should know:

• NEMU does not support run ELF files. You have to build a whole workload image according to this document.
  • For SPEC 2006, you may also refer to this video.
• NEMU does not promise also config combination is useable. I recommand to use riscv64-xs_defconfig config by make riscv64-xs_defconfig. This config is aligned with XiangShan RTL and supports RVV.

[learnlearnknowledge]

Hi, NEMU does support RVV.

Your description is not detailed enought to let us know what the problem is. You may provide more infomations:

• Everything you did before you encountered the problem?
• The Log that NEMU printed.

Also, there are some points you should know:

• NEMU does not support run ELF files. You have to build a whole workload image according to this document.

  • For SPEC 2006, you may also refer to this video.

• NEMU does not promise also config combination is useable. I recommand to use riscv64-xs_defconfig config by make riscv64-xs_defconfig. This config is aligned with XiangShan RTL and supports RVV.

NEMU用master分支最新代码，make menuconfig 查看vector extension v1.0是打开的，但是运行rv64gcbv编译的SPEC06 bin仍然报unhandled signal 4，illegal instruction，查看SPE06反汇编对应地址指令是vsetivli，rv64gcb编译的SPEC06 bin是正常的，麻烦问下NEMU需要修改什么配置支持vector扩展，谢谢

[learnlearnknowledge]

问题解决了，编译操作系统时dts要加上vector扩展，riscv linux更新最新版本