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| 1 | +# SPDX-FileCopyrightText: Copyright (c) <2026> NVIDIA CORPORATION & AFFILIATES. All rights reserved. |
| 2 | +# |
| 3 | +# SPDX-License-Identifier: Apache-2.0 |
| 4 | + |
| 5 | +import cuda.lang._datatype as datatype |
| 6 | +from cuda.lang._enums import ( |
| 7 | + MatrixLoadShape, |
| 8 | + MatrixLoadSourceFormat, |
| 9 | + MatrixStoreShape, |
| 10 | +) |
| 11 | +from cuda.lang._exception import InvalidValueError, TypeCheckingError |
| 12 | +from cuda.lang._ir.ir import Var |
| 13 | +from cuda.lang._ir.op_defs import RawNVVMIntrinsic |
| 14 | +from cuda.lang._ir.op_impl.vector_impl import ( |
| 15 | + vector_getitem, |
| 16 | + vector_undef, |
| 17 | + vector_with_item, |
| 18 | +) |
| 19 | +from cuda.lang._ir.type import MemorySpace, ScalarTy, VectorTy |
| 20 | +from cuda.lang._ir.type_checking_helpers import ( |
| 21 | + is_none, |
| 22 | + require_pointer_in_memory_space, |
| 23 | +) |
| 24 | +from cuda.lang._stub import load_store_matrix |
| 25 | +from cuda.tile._datatype import is_integral |
| 26 | +from cuda.tile._ir.op_impl import ( |
| 27 | + ImplRegistry, |
| 28 | + require_constant_bool, |
| 29 | + require_constant_enum, |
| 30 | + require_constant_int, |
| 31 | +) |
| 32 | +from cuda.tile._ir.core_ops import strictly_typed_const |
| 33 | +from cuda.tile._ir.ir import add_operation_variadic |
| 34 | + |
| 35 | + |
| 36 | +_registry = ImplRegistry() |
| 37 | +impl = _registry.impl |
| 38 | + |
| 39 | + |
| 40 | +def matrix_impl_registry() -> ImplRegistry: |
| 41 | + return _registry |
| 42 | + |
| 43 | + |
| 44 | +def ldmatrix_intrinsic_name( |
| 45 | + shape: MatrixLoadShape, |
| 46 | + count: int, |
| 47 | + transpose: bool, |
| 48 | + source_format: MatrixLoadSourceFormat | None, |
| 49 | +) -> str: |
| 50 | + name = f"llvm.nvvm.ldmatrix.sync.aligned.{shape.value}.x{count}" |
| 51 | + if transpose: |
| 52 | + name += ".trans" |
| 53 | + if source_format is MatrixLoadSourceFormat.B6X16_P32: |
| 54 | + return name + ".b8x16.b6x16_p32" |
| 55 | + if source_format is MatrixLoadSourceFormat.B4X16_P64: |
| 56 | + return name + ".b8x16.b4x16_p64" |
| 57 | + return name + (".b16" if shape is MatrixLoadShape.M8N8 else ".b8") |
| 58 | + |
| 59 | + |
| 60 | +@impl(load_store_matrix.load_matrix) |
| 61 | +def load_matrix_impl( |
| 62 | + src: Var, |
| 63 | + shape: Var, |
| 64 | + count: Var, |
| 65 | + transpose: Var, |
| 66 | + source_format: Var, |
| 67 | +) -> Var: |
| 68 | + require_pointer_in_memory_space(src, (MemorySpace.SHARED,)) |
| 69 | + shape_value = require_constant_enum(shape, MatrixLoadShape) |
| 70 | + count_value = require_constant_int(count) |
| 71 | + transpose_value = require_constant_bool(transpose) |
| 72 | + source_format_value = ( |
| 73 | + None |
| 74 | + if is_none(source_format) |
| 75 | + else require_constant_enum(source_format, MatrixLoadSourceFormat) |
| 76 | + ) |
| 77 | + if count_value not in (1, 2, 4): |
| 78 | + raise InvalidValueError("count must be 1, 2, or 4") |
| 79 | + register_count = count_value * ( |
| 80 | + 2 if shape_value is MatrixLoadShape.M16N16 else 1 |
| 81 | + ) |
| 82 | + register_type = ScalarTy(datatype.int32) |
| 83 | + |
| 84 | + name = f"llvm.nvvm.ldmatrix.sync.aligned.{shape_value.value}.x{count_value}" |
| 85 | + |
| 86 | + if transpose_value: |
| 87 | + name += ".trans" |
| 88 | + |
| 89 | + if source_format_value is MatrixLoadSourceFormat.B6X16_P32: |
| 90 | + name += ".b8x16.b6x16_p32" |
| 91 | + elif source_format_value is MatrixLoadSourceFormat.B4X16_P64: |
| 92 | + name += ".b8x16.b4x16_p64" |
| 93 | + else: |
| 94 | + name += ".b16" if shape_value is MatrixLoadShape.M8N8 else ".b8" |
| 95 | + |
| 96 | + registers = add_operation_variadic( |
| 97 | + RawNVVMIntrinsic, |
| 98 | + (register_type,) * register_count, |
| 99 | + intrinsic=name, |
| 100 | + operands_=(src,), |
| 101 | + ) |
| 102 | + if register_count == 1: |
| 103 | + return registers[0] |
| 104 | + |
| 105 | + result = vector_undef(VectorTy(datatype.int32, register_count)) |
| 106 | + for index, register in enumerate(registers): |
| 107 | + result = vector_with_item(result, index, register) |
| 108 | + return result |
| 109 | + |
| 110 | + |
| 111 | +def _store_register_count(values: Var) -> int: |
| 112 | + value_type = values.get_type() |
| 113 | + match value_type: |
| 114 | + case ScalarTy() as st: |
| 115 | + dtype = st.dtype |
| 116 | + count = 1 |
| 117 | + case VectorTy() as vt: |
| 118 | + dtype = vt.element_dtype |
| 119 | + count = vt.length |
| 120 | + case _: |
| 121 | + raise TypeCheckingError( |
| 122 | + "Expected a scalar or vector of 32-bit integers" |
| 123 | + ) |
| 124 | + |
| 125 | + if not is_integral(dtype) or dtype.bitwidth != 32: |
| 126 | + # TODO: is this too restrictive? should we bitcast if the operand is |
| 127 | + # not integral but is 32 bits wide? |
| 128 | + raise TypeCheckingError( |
| 129 | + "Expected a scalar or vector of 32-bit integers, " |
| 130 | + f"but got {value_type}" |
| 131 | + ) |
| 132 | + if count not in (1, 2, 4): |
| 133 | + raise InvalidValueError("Matrix store register count must be 1, 2, or 4") |
| 134 | + return count |
| 135 | + |
| 136 | + |
| 137 | +@impl(load_store_matrix.store_matrix) |
| 138 | +def store_matrix_impl( |
| 139 | + dst: Var, |
| 140 | + values: Var, |
| 141 | + shape: Var, |
| 142 | + transpose: Var, |
| 143 | +) -> None: |
| 144 | + require_pointer_in_memory_space(dst, (MemorySpace.SHARED,)) |
| 145 | + shape_value = require_constant_enum(shape, MatrixStoreShape) |
| 146 | + transpose_value = require_constant_bool(transpose) |
| 147 | + register_count = _store_register_count(values) |
| 148 | + if shape_value is MatrixStoreShape.M16N8 and not transpose_value: |
| 149 | + raise InvalidValueError("M16N8 requires transpose=True") |
| 150 | + |
| 151 | + if register_count == 1: |
| 152 | + registers = (values,) |
| 153 | + else: |
| 154 | + index_type = ScalarTy(datatype.int32) |
| 155 | + registers = tuple( |
| 156 | + vector_getitem(values, strictly_typed_const(index, index_type)) |
| 157 | + for index in range(register_count) |
| 158 | + ) |
| 159 | + |
| 160 | + name = f"llvm.nvvm.stmatrix.sync.aligned.{shape_value.value}.x{register_count}" |
| 161 | + if transpose_value: |
| 162 | + name += ".trans" |
| 163 | + name += ".b16" if shape_value is MatrixStoreShape.M8N8 else ".b8" |
| 164 | + |
| 165 | + add_operation_variadic( |
| 166 | + RawNVVMIntrinsic, |
| 167 | + (), |
| 168 | + intrinsic=name, |
| 169 | + operands_=(dst, *registers), |
| 170 | + ) |
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