FE-OSS APIs are experimental and subject to change.
The GEMM CuTeDSL APIs are type-erased and torch-lazy: torch is imported only when torch tensors are passed. JAX arrays are additionally accepted wherever the kernel's tensor layouts are expressible as row-major arrays (each API's page has a "JAX support" section with its exact contract):
- Dense fusions (amax, swiglu, srelu, dsrelu): full JAX eager support, plus
jax.jit-compatible XLA custom-call entry points for all four (built oncudnn.jax.call/ CuTeDSL's nativecutlass.jaxbridge; seegemm_amax.md"Using JAX arrays"). - Grouped / discrete-grouped: JAX eager support in discrete (pointer-array) weight modes — unfused grouped GEMM, glu/dglu (BF16), dsrelu (FP8), wgrad (BF16), and discrete-grouped swiglu/dswiglu (FP8) — plus a
jax.jit-compatible*_jax_sm100entry point for each of those same families (built oncudnn.jax.call; each API page documents its exact jit contract). Contiguous grouped MXFP8 SwiGLU/dSwiGLU wrappers accept Torch tensors and canonical JAX arrays, including underjax.jit, with explicit FP8 output dtype andsf_vec_size=32for JAX. The unified GLU wrapper likewise dispatches canonical MXFP8 JAX inputs togrouped_gemm_glu_jax_sm100(SwiGLU/GeGLU), which runs the Rubin GLU kernel on SM107. The unified dGLU, wgrad and quant wrappers likewise dispatch canonical JAX inputs togrouped_gemm_dglu_jax_sm100(dSwiGLU/dGeGLU),grouped_gemm_wgrad_jax_sm100andgrouped_gemm_quant_jax_forward, which run the Rubin kernels on SM107. The grouped SReLU, dSReLU, GLU+Hadamard and GLU+Hadamard+quant wrappers dispatch togrouped_gemm_srelu_jax_forward,grouped_gemm_dsrelu_jax_sm100,grouped_gemm_glu_hadamard_jax_forwardandgrouped_gemm_glu_hadamard_quant_jax_forward(SM100+, as in Torch; GLU+Hadamard+quant runs its Rubin kernel on SM107). These canonical entries take dense weights in MXFP8 or packed FP4 (asuint8, with E4M3 scales per 16 for NVFP4), and GLU, dGLU and wgrad also take BF16; each page lists its formats. Existing Torch behavior and wrapper defaults are unchanged. Discrete block-scaled weights, column-major bias layouts and the op classes reject JAX with clear errors. - proj_rope_mxfp8: JAX eager support on both input paths with
w_out_in=True(the transposed [in, out] weight view is torch-only), plus thejax.jit-compatiblegemm_proj_rope_mxfp8_jax_sm100entry point.
This folder documents the Python FE APIs implemented under python/cudnn. New APIs follow the Python API Naming Conventions. For details on currently implemented operations, see:
- Causal Conv1d and Decode Update
- FLA Integration Shims
- Kimi Delta Attention in JAX
- GEMM + Amax
- GEMM + RoPE + MXFP8 Projection
- Gated Attention Block (SM107) — projection, QK-norm + RoPE, SDPA, sigmoid gate, out projection as one FROST block (bf16 / FP8 / MXFP8, optional MXFP4 weights and NVFP4 / MXFP4 output); index-list sparse attention (
QsaSpec) and write-through into a paged KV cache - Triangle Multiplicative Update (SM100 / SM103 / SM107) — the AlphaFold-class outgoing / incoming triangle multiplication as three FROST launches behind cuEquivariance's
triangle_multiplicative_updatesignature (bf16) - Triangle Attention (SM107) — the AlphaFold-class attention with a pair bias and a key mask (right-padded lengths or a dense boolean mask) on the FROST SDPA engine behind cuEquivariance's
triangle_attentionsignature (bf16 / fp16, D <= 64) - Tail RoPE + Microscaled QDQ
- Prepared BF16 Tail RoPE
- GEMM + SwiGLU
- GEMM + sReLU
- GEMM + dsReLU
- Grouped GEMM (BF16)
- Grouped GEMM + GLU (Unified)
- Grouped GEMM + GLU + Hadamard
- Grouped GEMM + GLU + Hadamard + Quant
- Grouped GEMM + dGLU (Unified)
- Grouped GEMM + SwiGLU (Legacy, Contiguous-only)
- Grouped GEMM + dSwiGLU (Legacy, Contiguous-only)
- Grouped GEMM + sReLU (Unified) — optionally tanh
soft-clamped via
tanh_clamp_scale - Grouped GEMM + dsReLU (Unified)
- Discrete Grouped GEMM + SwiGLU
- Discrete Grouped GEMM + dSwiGLU
- Grouped GEMM + Quant (Legacy, Dense-only)
- Grouped GEMM + Quant (Unified)
- Grouped GEMM + Wgrad
- Block Sparse Attention (BSA)
- Query Sparse Attention (QSA): attention and indexer entry points
- QSA training from existing token indices
- QSA two-pass backend implementation notes
- DeepSeek Sparse Attention (DSA)
- Flex Attention and mask plan design
- HSTU Attention (Blackwell SM100/SM103)
- HSTU LayerNorm-Multiply-SiLU-Dropout (LMSD)
- Native Sparse Attention (NSA)
- CSA Fused Compressor
- Aligned HCA Backward
- DSv4.1 Vision RoPE Backward
- Engram Saved-State Gate
- RMSNorm + RHT + Amax
- SDPA Backward, d = 128, dense and THD MHA/GQA/MQA (SM100 / SM103)
- SDPA Backward (SM120)
- [SDPA Backward, d = 256 and d in (256, 512] (SM107 / Rubin; SM100 / SM103 via the 2x2-datapath body)](attention/sdpa_bwd_sm107.md)
- Compact GQA Backward (SM107)
- NVFP4 Attention QAT Backward
- RMSNorm + SiLU
- Fused Conv3D + Bias + Residual + RMSNorm + SiLU
- NVFP4 Block-Scale Conversion
- DSv4.1 mHC projection/RMS backward
All Frontend OSS APIs come installed with the nvidia-cudnn-frontend package. Except on Windows ARM64, nvidia-cutlass-dsl[cu13]>=4.8.0 and apache-tvm-ffi are required dependencies, so the CuTeDSL runtime comes with the base install (and the DSL pulls cuda-python in transitively):
pip install nvidia-cudnn-frontendOn Windows ARM64, these two runtime dependencies are excluded from the base installation, so the base install does not enable the CuTeDSL APIs there.
(pip install nvidia-cudnn-frontend[cutedsl] still works; the cutedsl extra now names only cuda-python. A few APIs still want extras of their own — the cuTile linear-attention engines need [cutile].)
The Triton NVFP4 attention QAT backward API additionally requires the
triton extra. Its API page documents the framework and GPU requirements.
Those required dependencies are framework-neutral. Install your tensor framework separately — from a checkout, the PEP 735 dependency groups pin the right companion packages:
pip install --group torch # torch + torch-c-dlpack-ext
pip install --group jax # jax >= 0.5 (XLA entry points via cutlass.jax, shipped with nvidia-cutlass-dsl)(For the published wheel, pip install torch torch-c-dlpack-ext or pip install "jax>=0.5" directly.)
After installation, you can import the APIs directly from the cudnn package, i.e. from cudnn import {your_operation}
The causal-convolution family exposes semantic PyTorch operations only through
cudnn.ops.causal_conv1d and cudnn.ops.causal_conv1d_update; they return
ordinary tensors and keep prepared kernel objects private. The wrapper and
class conventions below apply to prepared frontend-only kernel APIs.
Most compiler-style operations expose the following two APIs. Functional autograd integrations such as BSA and Flex Attention instead document their own wrapper and reusable-plan lifecycle on their operation pages.
- Single pythonic function call
- Allocates and returns output tensors
- Returns outputs as a
TupleDict(supports both dictionary-style key access and tuple unpacking) - No explicit compilation step – internally caches compiled kernels via a simple dictionary lookup
- When to use:
- Fast prototyping and common cases
- You want automatic allocation and minimal boilerplate
- You are okay with the library managing the compiled-kernel cache
from cudnn import {your_operation}_wrapper
result = {your_operation}_wrapper(
inputs,
...,
config_options,
...,
stream=None,
)
# Dictionary-style access (recommended)
primary_output = result["output_tensor_name"]
# Tuple unpacking (order follows documented wrapper output keys)
out0, out1 = result- Explicit lifecycle with compile and execute steps
- Reusable object with underlying compiled kernel for multiple executions
- Requires preallocated output tensors
- When to use:
- You need to reuse a compiled kernel across many calls
- You want explicit control over compilation and lifecycle management
from cudnn import {your_operation}
op = {your_operation}(
sample_inputs,
...,
sample_outputs,
...,
config_options,
...
)
op.compile()
op.execute(
inputs,
...
outputs,
...
current_stream=None,
)Methods:
check_support()– validates target problem configuration (i.e. tensor shapes, tensor strides, dtypes, tiling/cluster/kernel configurations, environment, etc.)compile()– compiles the kernel with the provided sample tensors and parameters.execute(inputs, ..., outputs, ..., current_stream)– runs the kernel with the provided inputs and outputs.
-
CUDA stream (
current_streamin class API,streamin wrapper)- The cuda stream to use for operation kernel execution.
- Default: None (uses default stream)
-
Determinism
- Several kernels reduce with cross-CTA atomics, so those outputs are not bit-exact run to
run. Kernels react to
torch.use_deterministic_algorithms(True): they switch to a deterministic path where one exists, and otherwise raise (or warn, underwarn_only) rather than silently return a non-reproducible result. - Where a deterministic path exists it can also be selected per call with
deterministic=True, independent of the torch setting. See Grouped GEMM + dsReLU.
- Several kernels reduce with cross-CTA atomics, so those outputs are not bit-exact run to
run. Kernels react to
- All FE OSS APIs are implemented in the
python/cudnndirectory. - Correctness tests/samples are implemented under
test/python/<operation>/cutedsl(JAX bindings undertest/python/<operation>/jax).