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526fc1f
refactor: reusable transport abstraction & optimized NSFStore pipeline
mag1c-h Oct 20, 2025
1583e40
add memory pool
ChenyuZhu1 Oct 21, 2025
ab74949
rewrite dramstore (1st version)
ChenyuZhu1 Oct 21, 2025
a2ce1c6
fix
ChenyuZhu1 Oct 21, 2025
afb42c6
fix
ChenyuZhu1 Oct 21, 2025
0b2df2a
fix
ChenyuZhu1 Oct 21, 2025
4ed17c7
fix
ChenyuZhu1 Oct 21, 2025
442c08d
fix
ChenyuZhu1 Oct 21, 2025
4d77ae1
add comment for later development
ChenyuZhu1 Oct 21, 2025
81d9111
Merge branch 'develop' into develop_Klukowski_new_dram
ChenyuZhu1 Oct 21, 2025
8e5f427
fix
ChenyuZhu1 Oct 21, 2025
cb3cba6
Merge branch 'develop_Klukowski_new_dram' of https://github.com/Cheny…
ChenyuZhu1 Oct 21, 2025
1ad417e
fix
ChenyuZhu1 Oct 21, 2025
985bb5f
fix
ChenyuZhu1 Oct 21, 2025
92fad3d
fix
ChenyuZhu1 Oct 21, 2025
fa47620
fix
ChenyuZhu1 Oct 21, 2025
bfe7c35
complete dramstore_connector.py
ChenyuZhu1 Oct 22, 2025
99aaf22
fix
ChenyuZhu1 Oct 22, 2025
cfe54b1
fix CMakeLists.txt
ChenyuZhu1 Oct 22, 2025
48f0aac
fix
ChenyuZhu1 Oct 22, 2025
ac8d0ad
fix
ChenyuZhu1 Oct 22, 2025
bee30b5
fix
ChenyuZhu1 Oct 22, 2025
304785f
fix
ChenyuZhu1 Oct 22, 2025
6b66d0b
rewrite dram test:dump (1/2)
ChenyuZhu1 Oct 22, 2025
5967d5c
format
ChenyuZhu1 Oct 22, 2025
6d86fbf
fix
ChenyuZhu1 Oct 22, 2025
ae27cb1
rewrite dram test:fetch (2/2)
ChenyuZhu1 Oct 22, 2025
a10cd6e
modify dram test script
ChenyuZhu1 Oct 22, 2025
96a288d
fix
ChenyuZhu1 Oct 23, 2025
d273924
fix
ChenyuZhu1 Oct 23, 2025
6eb4107
naive try: add device intf into memory pool
ChenyuZhu1 Oct 23, 2025
67cf873
fix
ChenyuZhu1 Oct 23, 2025
fa5be7a
fix
ChenyuZhu1 Oct 23, 2025
817e16f
fix
ChenyuZhu1 Oct 23, 2025
3cf8fc5
fix
ChenyuZhu1 Oct 23, 2025
6f5c7f4
fix
ChenyuZhu1 Oct 23, 2025
931a76d
fix
ChenyuZhu1 Oct 23, 2025
7d20b70
fix
ChenyuZhu1 Oct 23, 2025
97bf72e
fix
ChenyuZhu1 Oct 23, 2025
1c63e53
fix
ChenyuZhu1 Oct 24, 2025
58c8afb
fix
ChenyuZhu1 Oct 24, 2025
520aa17
fix
ChenyuZhu1 Oct 24, 2025
0956b4d
fix
ChenyuZhu1 Oct 24, 2025
7be83cc
fix
ChenyuZhu1 Oct 24, 2025
85dc83a
fix
ChenyuZhu1 Oct 24, 2025
f004663
fix
ChenyuZhu1 Oct 24, 2025
bd73108
fix
ChenyuZhu1 Oct 24, 2025
2a07228
fix
ChenyuZhu1 Oct 24, 2025
2a2a588
fix
ChenyuZhu1 Oct 24, 2025
9e7db37
fix
ChenyuZhu1 Oct 24, 2025
d6c2b3c
fix
ChenyuZhu1 Oct 28, 2025
c6812e9
update memPool intf
ChenyuZhu1 Oct 28, 2025
b8f8e85
fix
ChenyuZhu1 Oct 28, 2025
2333eb5
fix
ChenyuZhu1 Oct 28, 2025
9a7ba9c
fix
ChenyuZhu1 Oct 28, 2025
0d15c0d
Merge remote-tracking branch 'upstream/develop' into develop_Klukowsk…
ChenyuZhu1 Oct 29, 2025
41b4028
try reconstruct threadPool in dramstore (naive version)
ChenyuZhu1 Oct 29, 2025
5997c36
fix
ChenyuZhu1 Oct 29, 2025
93b35e8
fix
ChenyuZhu1 Oct 29, 2025
2860f46
fix
ChenyuZhu1 Oct 29, 2025
b8dc7e8
fix
ChenyuZhu1 Oct 29, 2025
ecf62ca
fix
ChenyuZhu1 Oct 29, 2025
30fc9aa
fix
ChenyuZhu1 Oct 29, 2025
6ae7578
fix
ChenyuZhu1 Oct 29, 2025
799c55c
fix
ChenyuZhu1 Oct 29, 2025
1fc2305
fix
ChenyuZhu1 Oct 30, 2025
5a890fa
fix
ChenyuZhu1 Oct 30, 2025
38c9ab5
fix
ChenyuZhu1 Oct 30, 2025
03d3be8
fix
ChenyuZhu1 Oct 30, 2025
910c376
fix
ChenyuZhu1 Oct 30, 2025
6037af9
fix
ChenyuZhu1 Oct 30, 2025
0acc5c6
fix
ChenyuZhu1 Oct 30, 2025
fbfcba8
fix
ChenyuZhu1 Oct 30, 2025
0a1776a
remove redundant comments
ChenyuZhu1 Oct 31, 2025
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250 changes: 0 additions & 250 deletions test/test_ucm_dram.py

This file was deleted.

7 changes: 5 additions & 2 deletions ucm/store/dramstore/CMakeLists.txt
Original file line number Diff line number Diff line change
@@ -1,7 +1,10 @@
file(GLOB_RECURSE UCMSTORE_DRAM_CC_SOURCE_FILES "./cc/*.cc")
add_library(dramstore STATIC ${UCMSTORE_DRAM_CC_SOURCE_FILES})
target_include_directories(dramstore PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/cc)
target_link_libraries(dramstore PUBLIC storeinfra storetask)
target_include_directories(dramstore PUBLIC
${CMAKE_CURRENT_SOURCE_DIR}/cc/api
${CMAKE_CURRENT_SOURCE_DIR}/cc/domain
)
target_link_libraries(dramstore PUBLIC storeinfra storedevice storetask)

file(GLOB_RECURSE UCMSTORE_DRAM_CPY_SOURCE_FILES "./cpy/*.cc")
pybind11_add_module(ucmdramstore ${UCMSTORE_DRAM_CPY_SOURCE_FILES})
Expand Down
65 changes: 54 additions & 11 deletions ucm/store/dramstore/cc/api/dramstore.cc
Original file line number Diff line number Diff line change
Expand Up @@ -24,27 +24,70 @@
#include "dramstore.h"
#include "logger/logger.h"
#include "status/status.h"
#include "trans/dram_trans_manager.h"
#include "memory/memory_pool.h"

namespace UC {

class DRAMStoreImpl : public DRAMStore {
public:
int32_t Setup(const size_t ioSize, const size_t capacity, const int32_t deviceId) { return -1; }
int32_t Alloc(const std::string& block) override { return -1; }
bool Lookup(const std::string& block) override { return false; }
void Commit(const std::string& block, const bool success) override {}
int32_t Setup(const Config& config) {
auto status = this->memPool_.Setup(config.deviceId, config.capacity, config.blockSize);
if (status.Failure()) {
UC_ERROR("Failed({}) to setup MemoryPool.", status);
return status.Underlying();
}
status = this->transMgr_.Setup(config.deviceId, config.streamNumber, &this->memPool_, config.timeoutMs);
if (status.Failure()) {
UC_ERROR("Failed({}) to setup TsfTaskManager.", status);
return status.Underlying();
}
return Status::OK().Underlying();
}
int32_t Alloc(const std::string& block) override { return this->memPool_.NewBlock(block).Underlying(); }
bool Lookup(const std::string& block) override { return this->memPool_.LookupBlock(block); }
void Commit(const std::string& block, const bool success) override { this->memPool_.CommitBlock(block, success).Underlying(); }
std::list<int32_t> Alloc(const std::list<std::string>& blocks) override
{
return std::list<int32_t>();
std::list<int32_t> results;
for (const auto &block : blocks) {
results.emplace_back(this->Alloc(block));
}
return results;
}
std::list<bool> Lookup(const std::list<std::string>& blocks) override
{
return std::list<bool>();
std::list<bool> founds;
for (const auto &block : blocks) {
founds.emplace_back(this->Lookup(block));
}
return founds;
}
void Commit(const std::list<std::string>& blocks, const bool success) override {
for (const auto &block : blocks) {
this->Commit(block, success);
}
}
size_t Submit(Task&& task) override {
auto taskId = Task::invalid;
auto status = this->transMgr_.Submit(std::move(task), taskId);
if (status.Failure()) { taskId = Task::invalid; }
return taskId; }

int32_t Wait(const size_t task) override {
return this->transMgr_.Wait(task).Underlying();
}

int32_t Check(const size_t task, bool& finish) override {
return this->transMgr_.Check(task, finish).Underlying();
}
void Commit(const std::list<std::string>& blocks, const bool success) override {}
size_t Submit(Task&& task) override { return 0; }
int32_t Wait(const size_t task) override { return -1; }
int32_t Check(const size_t task, bool& finish) override { return -1; }


private:

DramTransManager transMgr_;
MemoryPool memPool_;

};

int32_t DRAMStore::Setup(const Config& config)
Expand All @@ -55,7 +98,7 @@ int32_t DRAMStore::Setup(const Config& config)
return Status::OutOfMemory().Underlying();
}
this->impl_ = impl;
return impl->Setup(config.ioSize, config.capacity, config.deviceId);
return impl->Setup(config);
}

} // namespace UC
8 changes: 5 additions & 3 deletions ucm/store/dramstore/cc/api/dramstore.h
Original file line number Diff line number Diff line change
Expand Up @@ -31,11 +31,13 @@ namespace UC {
class DRAMStore : public CCStore {
public:
struct Config {
size_t ioSize;
size_t capacity;
size_t blockSize;
int32_t deviceId;
Config(const size_t ioSize, const size_t capacity)
: ioSize{ioSize}, capacity{capacity}, deviceId{-1}
size_t streamNumber;
size_t timeoutMs;
Config(const size_t capacity, const size_t blockSize, const int32_t deviceId, const size_t streamNumber, const size_t timeoutMs)
: capacity{capacity}, blockSize{blockSize}, deviceId{deviceId}, streamNumber{streamNumber}, timeoutMs{timeoutMs}
{
}
};
Expand Down
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