From 02e4f4b91a947426223942e77076053bd8f22853 Mon Sep 17 00:00:00 2001 From: Nilay <44514563+nilayt06@users.noreply.github.com> Date: Fri, 8 May 2026 18:32:10 -0400 Subject: [PATCH] Add files via upload --- Design Rule Check - PCB1.drc | 45 ++ Design Rule Check - PCB1.html | 320 ++++++++++++++ PCB1-RectHoles.TXT | 23 + PCB1-macro.APR_LIB | 36 ++ PCB1.DRR | 23 + PCB1.EXTREP | 18 + PCB1.GBL | 781 ++++++++++++++++++++++++++++++++++ PCB1.GBO | 16 + PCB1.GBP | 16 + PCB1.GBS | 178 ++++++++ PCB1.GM | 23 + PCB1.GTL | 448 +++++++++++++++++++ PCB1.GTO | 724 +++++++++++++++++++++++++++++++ PCB1.GTP | 52 +++ PCB1.GTS | 214 ++++++++++ PCB1.LDP | 3 + PCB1.REP | 194 +++++++++ PCB1.TXT | 78 ++++ PCB1.apr | 38 ++ Status Report.Txt | 13 + 20 files changed, 3243 insertions(+) create mode 100644 Design Rule Check - PCB1.drc create mode 100644 Design Rule Check - PCB1.html create mode 100644 PCB1-RectHoles.TXT create mode 100644 PCB1-macro.APR_LIB create mode 100644 PCB1.DRR create mode 100644 PCB1.EXTREP create mode 100644 PCB1.GBL create mode 100644 PCB1.GBO create mode 100644 PCB1.GBP create mode 100644 PCB1.GBS create mode 100644 PCB1.GM create mode 100644 PCB1.GTL create mode 100644 PCB1.GTO create mode 100644 PCB1.GTP create mode 100644 PCB1.GTS create mode 100644 PCB1.LDP create mode 100644 PCB1.REP create mode 100644 PCB1.TXT create mode 100644 PCB1.apr create mode 100644 Status Report.Txt diff --git a/Design Rule Check - PCB1.drc b/Design Rule Check - PCB1.drc new file mode 100644 index 0000000..410fe33 --- /dev/null +++ b/Design Rule Check - PCB1.drc @@ -0,0 +1,45 @@ +Protel Design System Design Rule Check +PCB File : C:\Users\Public\Documents\Altium\ARC_Powerboard_2.0\PCB1.PcbDoc +Date : 3/11/2026 +Time : 7:17:54 PM + +Processing Rule : Clearance Constraint (Gap=0.254mm) (All),(All) +Rule Violations :0 + +Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All) +Rule Violations :0 + +Processing Rule : Un-Routed Net Constraint ( (All) ) +Rule Violations :0 + +Processing Rule : Modified Polygon (Allow modified: No), (Allow shelved: No) +Rule Violations :0 + +Processing Rule : Width Constraint (Min=1.27mm) (Max=2.54mm) (Preferred=2.54mm) (All) +Rule Violations :0 + +Processing Rule : Routing Topology Rule(Topology=Shortest) (All) +Rule Violations :0 + +Processing Rule : Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All) +Rule Violations :0 + +Processing Rule : Hole To Hole Clearance (Gap=0.254mm) (All),(All) +Rule Violations :0 + +Processing Rule : Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All) +Rule Violations :0 + +Processing Rule : Silk to Silk (Clearance=0.254mm) (All),(All) +Rule Violations :0 + +Processing Rule : Net Antennae (Tolerance=0mm) (All) +Rule Violations :0 + +Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All) +Rule Violations :0 + + +Violations Detected : 0 +Waived Violations : 0 +Time Elapsed : 00:00:00 \ No newline at end of file diff --git a/Design Rule Check - PCB1.html b/Design Rule Check - PCB1.html new file mode 100644 index 0000000..a9550c2 --- /dev/null +++ b/Design Rule Check - PCB1.html @@ -0,0 +1,320 @@ + + + +Design Rule Verification Report + +Altium

Design Rule Verification Report

+ + + +
+ + + + + + + + + + + + + + + + + + + + + +
Date:3/11/2026
Time:7:17:54 PM
Elapsed Time:00:00:00
Filename:C:\Users\Public\Documents\Altium\ARC_Powerboard_2.0\PCB1.PcbDoc
+		 + + + + + + + + + +
Warnings:0
Rule Violations:0
+

Summary

 + + + + + + + + +
WarningsCount
Total0

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Rule ViolationsCount
Clearance Constraint (Gap=0.254mm) (All),(All)0
Short-Circuit Constraint (Allowed=No) (All),(All)0
Un-Routed Net Constraint ( (All) )0
Modified Polygon (Allow modified: No), (Allow shelved: No)0
Width Constraint (Min=1.27mm) (Max=2.54mm) (Preferred=2.54mm) (All)0
Routing Topology Rule(Topology=Shortest) (All)0
Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)0
Hole To Hole Clearance (Gap=0.254mm) (All),(All)0
Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)0
Silk to Silk (Clearance=0.254mm) (All),(All)0
Net Antennae (Tolerance=0mm) (All)0
Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)0
Total0

+ diff --git a/PCB1-RectHoles.TXT b/PCB1-RectHoles.TXT new file mode 100644 index 0000000..dbefcf9 --- /dev/null +++ b/PCB1-RectHoles.TXT @@ -0,0 +1,23 @@ +M48 +;Layer_Color=9474304 +;FILE_FORMAT=4:4 +METRIC,LZ +;TYPE=PLATED +T02F00S00C0.8000 +% +G90 +G05 +T02 +G00X0012451Y0024283 +M15 +G01X0010251 +M16 +G00X0008551Y0027983 +M15 +G01Y0030183 +M16 +G00X0014351Y0027983 +M15 +G01Y0030183 +M16 +M30 diff --git a/PCB1-macro.APR_LIB b/PCB1-macro.APR_LIB new file mode 100644 index 0000000..fdd57ce --- /dev/null +++ b/PCB1-macro.APR_LIB @@ -0,0 +1,36 @@ +G04:AMPARAMS|DCode=35|XSize=4.2032mm|YSize=2.0032mm|CornerRadius=0.5516mm|HoleSize=0mm|Usage=FLASHONLY|Rotation=90.000|XOffset=0mm|YOffset=0mm|HoleType=Round|Shape=RoundedRectangle|* +%AMROUNDEDRECTD35* +21,1,4.2032,0.9000,0,0,90.0* +21,1,3.1000,2.0032,0,0,90.0* +1,1,1.1032,0.4500,1.5500* +1,1,1.1032,0.4500,-1.5500* +1,1,1.1032,-0.4500,-1.5500* +1,1,1.1032,-0.4500,1.5500* +% +G04:AMPARAMS|DCode=36|XSize=4.2032mm|YSize=2.0032mm|CornerRadius=0.5516mm|HoleSize=0mm|Usage=FLASHONLY|Rotation=180.000|XOffset=0mm|YOffset=0mm|HoleType=Round|Shape=RoundedRectangle|* +%AMROUNDEDRECTD36* +21,1,4.2032,0.9000,0,0,180.0* +21,1,3.1000,2.0032,0,0,180.0* +1,1,1.1032,-1.5500,0.4500* +1,1,1.1032,1.5500,0.4500* +1,1,1.1032,1.5500,-0.4500* +1,1,1.1032,-1.5500,-0.4500* +% +G04:AMPARAMS|DCode=47|XSize=4mm|YSize=1.8mm|CornerRadius=0.45mm|HoleSize=0mm|Usage=FLASHONLY|Rotation=90.000|XOffset=0mm|YOffset=0mm|HoleType=Round|Shape=RoundedRectangle|* +%AMROUNDEDRECTD47* +21,1,4.0000,0.9000,0,0,90.0* +21,1,3.1000,1.8000,0,0,90.0* +1,1,0.9000,0.4500,1.5500* +1,1,0.9000,0.4500,-1.5500* +1,1,0.9000,-0.4500,-1.5500* +1,1,0.9000,-0.4500,1.5500* +% +G04:AMPARAMS|DCode=48|XSize=4mm|YSize=1.8mm|CornerRadius=0.45mm|HoleSize=0mm|Usage=FLASHONLY|Rotation=180.000|XOffset=0mm|YOffset=0mm|HoleType=Round|Shape=RoundedRectangle|* +%AMROUNDEDRECTD48* +21,1,4.0000,0.9000,0,0,180.0* +21,1,3.1000,1.8000,0,0,180.0* +1,1,0.9000,-1.5500,0.4500* +1,1,0.9000,1.5500,0.4500* +1,1,0.9000,1.5500,-0.4500* +1,1,0.9000,-1.5500,-0.4500* +% diff --git a/PCB1.DRR b/PCB1.DRR new file mode 100644 index 0000000..febbe26 --- /dev/null +++ b/PCB1.DRR @@ -0,0 +1,23 @@ +---------------------------------------------------------------------------------------------------------------------------------- +NCDrill File Report For: PCB1.PcbDoc 3/11/2026 7:21:25 PM +---------------------------------------------------------------------------------------------------------------------------------- + +Layer Pair : Top Layer to Bottom Layer +ASCII RoundHoles File : PCB1.TXT +ASCII RectHoles File : PCB1-RectHoles.TXT + +Tool Hole Size Hole Tolerance Hole Type Hole Count Plated Tool Travel +---------------------------------------------------------------------------------------------------------------------------------- +T1 0.635mm (25mil) Round 30 PTH 142.78mm (5.62inch) +T2 0.8mm (31mil) Rectangle 3 PTH 28.82mm (1.13inch) +T3 0.85mm (33mil) Round 4 PTH 50.70mm (2.00inch) +T4 1mm (39mil) Round 2 PTH 2.50mm (0.10inch) +T5 1.295mm (51mil) Round 2 PTH 2.54mm (0.10inch) +T6 1.55mm (61mil) Round 6 PTH 53.34mm (2.10inch) +T7 1.65mm (65mil) Round 4 PTH 51.91mm (2.04inch) +T8 1.854mm (73mil) Round 3 PTH 9.65mm (0.38inch) +T9 3.2mm (126mil) Round 4 PTH 120.00mm (4.72inch) +---------------------------------------------------------------------------------------------------------------------------------- +Totals 58 + +Total Processing Time (hh:mm:ss) : 00:00:00 diff --git a/PCB1.EXTREP b/PCB1.EXTREP new file mode 100644 index 0000000..4fdaa90 --- /dev/null +++ b/PCB1.EXTREP @@ -0,0 +1,18 @@ +------------------------------------------------------------------------------------------ +Gerber File Extension Report For: PCB1.GBR 3/11/2026 7:20:57 PM +------------------------------------------------------------------------------------------ + + +------------------------------------------------------------------------------------------ +Layer Extension Layer Description +------------------------------------------------------------------------------------------ +.GTO Top Overlay +.GTP Top Paste +.GTS Top Solder +.GTL Top Layer +.GBL Bottom Layer +.GBS Bottom Solder +.GBP Bottom Paste +.GBO Bottom Overlay +.GM Profile +------------------------------------------------------------------------------------------ diff --git a/PCB1.GBL b/PCB1.GBL new file mode 100644 index 0000000..174ef98 --- /dev/null +++ b/PCB1.GBL @@ -0,0 +1,781 @@ +G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.3.0 (6)* +G04* +G04 Layer_Physical_Order=2* +G04 Layer_Color=16711680* +%FSLAX44Y44*% +%MOMM*% +G71* +G04* +G04 #@! TF.SameCoordinates,B629A01A-656D-4AE3-8AA2-BA5F11861BCF* +G04* +G04* +G04 #@! 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TF.GenerationSoftware,Altium Limited,Altium Designer,26.3.0 (6)* +G04* +G04 Layer_Color=32896* +%FSLAX44Y44*% +%MOMM*% +G71* +G04* +G04 #@! TF.SameCoordinates,B629A01A-656D-4AE3-8AA2-BA5F11861BCF* +G04* +G04* +G04 #@! TF.FilePolarity,Positive* +G04* +G01* +G75* +M02* diff --git a/PCB1.GBP b/PCB1.GBP new file mode 100644 index 0000000..781111a --- /dev/null +++ b/PCB1.GBP @@ -0,0 +1,16 @@ +G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.3.0 (6)* +G04* +G04 Layer_Color=128* +%FSLAX44Y44*% +%MOMM*% +G71* +G04* +G04 #@! TF.SameCoordinates,B629A01A-656D-4AE3-8AA2-BA5F11861BCF* +G04* +G04* +G04 #@! TF.FilePolarity,Positive* +G04* +G01* +G75* +M02* diff --git a/PCB1.GBS b/PCB1.GBS new file mode 100644 index 0000000..e800f45 --- /dev/null +++ b/PCB1.GBS @@ -0,0 +1,178 @@ +G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.3.0 (6)* +G04* +G04 Layer_Color=16711935* +%FSLAX44Y44*% +%MOMM*% +G71* +G04* +G04 #@! TF.SameCoordinates,B629A01A-656D-4AE3-8AA2-BA5F11861BCF* +G04* +G04* +G04 #@! TF.FilePolarity,Negative* +G04* +G01* +G75* +%ADD28C,3.3782*% +%ADD29R,3.3782X3.3782*% +%ADD30O,3.1750X2.0320*% +%ADD31R,1.5500X1.5500*% +%ADD32C,2.0032*% +%ADD33R,2.5000X2.5000*% +%ADD34O,3.5000X2.5000*% +G04:AMPARAMS|DCode=35|XSize=4.2032mm|YSize=2.0032mm|CornerRadius=0.5516mm|HoleSize=0mm|Usage=FLASHONLY|Rotation=90.000|XOffset=0mm|YOffset=0mm|HoleType=Round|Shape=RoundedRectangle|* +%AMROUNDEDRECTD35* +21,1,4.2032,0.9000,0,0,90.0* +21,1,3.1000,2.0032,0,0,90.0* +1,1,1.1032,0.4500,1.5500* +1,1,1.1032,0.4500,-1.5500* +1,1,1.1032,-0.4500,-1.5500* +1,1,1.1032,-0.4500,1.5500* +% +%ADD35ROUNDEDRECTD35*% +G04:AMPARAMS|DCode=36|XSize=4.2032mm|YSize=2.0032mm|CornerRadius=0.5516mm|HoleSize=0mm|Usage=FLASHONLY|Rotation=180.000|XOffset=0mm|YOffset=0mm|HoleType=Round|Shape=RoundedRectangle|* +%AMROUNDEDRECTD36* +21,1,4.2032,0.9000,0,0,180.0* +21,1,3.1000,2.0032,0,0,180.0* +1,1,1.1032,-1.5500,0.4500* +1,1,1.1032,1.5500,0.4500* +1,1,1.1032,1.5500,-0.4500* +1,1,1.1032,-1.5500,-0.4500* +% +%ADD36ROUNDEDRECTD36*% +%ADD37C,1.5500*% +%ADD38C,2.5000*% +%ADD39O,2.5400X5.0800*% +%ADD40C,6.2032*% +%ADD41C,1.0922*% +D28* +X455930Y410210D02* +D03* +Y207010D02* +D03* +Y308610D02* +D03* +X252730Y410210D02* +D03* +Y334010D02* +D03* +D29* +Y283210D02* +D03* +D30* +X541020Y217170D02* +D03* +Y242570D02* +D03* +D31* +X552450Y323450D02* +D03* +D32* +X417410Y63771D02* +D03* +X130810Y393700D02* +D03* +X452410Y63771D02* +D03* +X165810Y393700D02* +D03* +D33* +X519460Y123710D02* +D03* +D34* +X79980Y183630D02* +D03* +Y144030D02* +D03* +D35* +X85510Y290830D02* +D03* +X143510D02* +D03* +D36* +X113510Y242830D02* +D03* +D37* +X552450Y298450D02* +D03* +D38* +X519460Y163310D02* +D03* +D39* +X186690Y121920D02* +D03* +X234950D02* +D03* +X283210D02* +D03* +D40* +X550000Y50000D02* +D03* +Y400000D02* +D03* +X50000Y50000D02* +D03* +Y400000D02* +D03* +D41* +X397330Y397730D02* +D03* +Y367730D02* +D03* +Y337730D02* +D03* +Y307730D02* +D03* +Y277730D02* +D03* +Y247730D02* +D03* +X367330Y397730D02* +D03* +Y367730D02* +D03* +Y337730D02* +D03* +Y307730D02* +D03* +Y277730D02* +D03* +Y247730D02* +D03* +Y217730D02* +D03* +X337330Y397730D02* +D03* +Y367730D02* +D03* +Y337730D02* +D03* +Y307730D02* +D03* +Y277730D02* +D03* +Y247730D02* +D03* +Y217730D02* +D03* +X307330Y397730D02* +D03* +Y367730D02* +D03* +Y337730D02* +D03* +Y307730D02* +D03* +Y277730D02* +D03* +Y247730D02* +D03* +Y217730D02* +D03* +X368300Y40640D02* +D03* +X464820Y153670D02* +D03* +X199390Y327050D02* +D03* +M02* diff --git a/PCB1.GM b/PCB1.GM new file mode 100644 index 0000000..f7a9526 --- /dev/null +++ b/PCB1.GM @@ -0,0 +1,23 @@ +G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.3.0 (6)* +G04* +G04 Layer_Color=0* +%FSLAX44Y44*% +%MOMM*% +G71* +G04* +G04 #@! TF.SameCoordinates,B629A01A-656D-4AE3-8AA2-BA5F11861BCF* +G04* +G04* +G04 #@! TF.FilePolarity,Positive* +G04* +G01* +G75* +%ADD51C,0.0254*% +D51* +X-0Y0D02* +X600000D01* +Y450000D01* +X-0D01* +Y0D01* +M02* diff --git a/PCB1.GTL b/PCB1.GTL new file mode 100644 index 0000000..134f2ad --- /dev/null +++ b/PCB1.GTL @@ -0,0 +1,448 @@ +G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.3.0 (6)* +G04* +G04 Layer_Physical_Order=1* +G04 Layer_Color=255* +%FSLAX44Y44*% +%MOMM*% +G71* +G04* +G04 #@! TF.SameCoordinates,B629A01A-656D-4AE3-8AA2-BA5F11861BCF* +G04* +G04* +G04 #@! TF.FilePolarity,Positive* +G04* +G01* +G75* +%ADD16R,1.4000X1.5000*% +%ADD17R,2.4500X2.2500*% +%ADD18R,2.2500X2.8500*% +%ADD19R,1.4500X1.2000*% +%ADD20R,1.5000X1.4000*% +%ADD21R,2.2500X2.8000*% +%ADD30O,3.1750X2.0320*% +%ADD31R,1.5500X1.5500*% +%ADD33R,2.5000X2.5000*% +%ADD34O,3.5000X2.5000*% +%ADD37C,1.5500*% +%ADD38C,2.5000*% +%ADD39O,2.5400X5.0800*% +%ADD42C,1.2700*% +%ADD43C,2.5400*% +%ADD44C,3.1750*% +%ADD45R,3.1750X3.1750*% +%ADD46C,1.8000*% +G04:AMPARAMS|DCode=47|XSize=4mm|YSize=1.8mm|CornerRadius=0.45mm|HoleSize=0mm|Usage=FLASHONLY|Rotation=90.000|XOffset=0mm|YOffset=0mm|HoleType=Round|Shape=RoundedRectangle|* +%AMROUNDEDRECTD47* +21,1,4.0000,0.9000,0,0,90.0* +21,1,3.1000,1.8000,0,0,90.0* +1,1,0.9000,0.4500,1.5500* +1,1,0.9000,0.4500,-1.5500* +1,1,0.9000,-0.4500,-1.5500* +1,1,0.9000,-0.4500,1.5500* +% +%ADD47ROUNDEDRECTD47*% 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TF.GenerationSoftware,Altium Limited,Altium Designer,26.3.0 (6)* +G04* +G04 Layer_Color=65535* +%FSLAX44Y44*% +%MOMM*% +G71* +G04* +G04 #@! TF.SameCoordinates,B629A01A-656D-4AE3-8AA2-BA5F11861BCF* +G04* +G04* +G04 #@! TF.FilePolarity,Positive* +G04* +G01* +G75* +%ADD10C,0.1000*% +%ADD11C,0.2500*% +%ADD12C,0.2000*% +%ADD13C,0.1270*% +%ADD14C,0.1524*% +%ADD15C,0.2540*% +D10* +X361192Y112434D02* +G03* +X361192Y112434I-500J0D01* +G01* +D11* +X119120Y134620D02* +G03* +X119120Y134620I-1250J0D01* +G01* +X520710Y96760D02* +G03* +X520710Y96760I-1250J0D01* +G01* +X553700Y354700D02* +G03* +X553700Y354700I-1250J0D01* +G01* +X81230Y210580D02* +G03* +X81230Y210580I-1250J0D01* +G01* +X211040Y264450D02* +G03* +X211040Y264450I-1250J0D01* +G01* +D12* +X477410Y63771D02* +G03* +X477410Y63771I-42500J0D01* +G01* +X190810Y393700D02* +G03* +X190810Y393700I-42500J0D01* +G01* +X136510Y245830D02* +X152510D01* +X7510D02* +X90510D01* +X152510D02* +Y267830D01* +Y313830D02* +Y335830D01* +X7510Y245830D02* +Y335830D01* +X152510D01* +X149870Y189370D02* +X154620D01* +X149870Y143370D02* +X154620D01* +X114620Y189370D02* +X119370D01* +X114620Y143370D02* +X119370D01* +X154620D02* +Y189370D01* +X114620Y143370D02* +Y189370D01* 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TF.GenerationSoftware,Altium Limited,Altium Designer,26.3.0 (6)* +G04* +G04 Layer_Color=8421504* +%FSLAX44Y44*% +%MOMM*% +G71* +G04* +G04 #@! TF.SameCoordinates,B629A01A-656D-4AE3-8AA2-BA5F11861BCF* +G04* +G04* +G04 #@! TF.FilePolarity,Positive* +G04* +G01* +G75* +%ADD16R,1.4000X1.5000*% +%ADD17R,2.4500X2.2500*% +%ADD18R,2.2500X2.8500*% +%ADD19R,1.4500X1.2000*% +%ADD20R,1.5000X1.4000*% +%ADD21R,2.2500X2.8000*% +D16* +X443840Y153670D02* +D03* +X424840D02* +D03* +D17* +X375942Y150184D02* +D03* +Y122684D02* +D03* +D18* +X134620Y186370D02* +D03* +Y146370D02* +D03* +D19* +X368300Y61890D02* +D03* +Y82890D02* +D03* +D20* +X199390Y310490D02* +D03* +Y291490D02* +D03* +D21* +X193040Y251700D02* +D03* +Y218200D02* +D03* +M02* diff --git a/PCB1.GTS b/PCB1.GTS new file mode 100644 index 0000000..6d21967 --- /dev/null +++ b/PCB1.GTS @@ -0,0 +1,214 @@ +G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.3.0 (6)* +G04* +G04 Layer_Color=8388736* +%FSLAX44Y44*% +%MOMM*% +G71* +G04* +G04 #@! TF.SameCoordinates,B629A01A-656D-4AE3-8AA2-BA5F11861BCF* +G04* +G04* +G04 #@! TF.FilePolarity,Negative* +G04* +G01* +G75* +%ADD22R,1.6032X1.7032*% +%ADD23R,2.6532X2.4532*% +%ADD24R,2.4532X3.0532*% +%ADD25R,1.6532X1.4032*% +%ADD26R,1.7032X1.6032*% +%ADD27R,2.4532X3.0032*% +%ADD28C,3.3782*% +%ADD29R,3.3782X3.3782*% +%ADD30O,3.1750X2.0320*% +%ADD31R,1.5500X1.5500*% +%ADD32C,2.0032*% +%ADD33R,2.5000X2.5000*% +%ADD34O,3.5000X2.5000*% +G04:AMPARAMS|DCode=35|XSize=4.2032mm|YSize=2.0032mm|CornerRadius=0.5516mm|HoleSize=0mm|Usage=FLASHONLY|Rotation=90.000|XOffset=0mm|YOffset=0mm|HoleType=Round|Shape=RoundedRectangle|* +%AMROUNDEDRECTD35* +21,1,4.2032,0.9000,0,0,90.0* +21,1,3.1000,2.0032,0,0,90.0* +1,1,1.1032,0.4500,1.5500* +1,1,1.1032,0.4500,-1.5500* +1,1,1.1032,-0.4500,-1.5500* +1,1,1.1032,-0.4500,1.5500* +% +%ADD35ROUNDEDRECTD35*% +G04:AMPARAMS|DCode=36|XSize=4.2032mm|YSize=2.0032mm|CornerRadius=0.5516mm|HoleSize=0mm|Usage=FLASHONLY|Rotation=180.000|XOffset=0mm|YOffset=0mm|HoleType=Round|Shape=RoundedRectangle|* +%AMROUNDEDRECTD36* +21,1,4.2032,0.9000,0,0,180.0* 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0000000..9572cfe --- /dev/null +++ b/PCB1.LDP @@ -0,0 +1,3 @@ +Layer Pairs Export File for PCB: C:\Users\Public\Documents\Altium\ARC_Powerboard_2.0\PCB1.PcbDoc +LayersSetName=Top_Bot_Thru_Holes|DrillFile=pcb1.txt|DrillLayers=gtl,gbl +LayersSetName=Top_Bot_Rect_Holes|DrillFile=pcb1-rectholes.txt|DrillLayers=gtl,gbl diff --git a/PCB1.REP b/PCB1.REP new file mode 100644 index 0000000..b4ae26e --- /dev/null +++ b/PCB1.REP @@ -0,0 +1,194 @@ +************************************************************* +FileName = PCB1.GBR +AutoAperture = True +************************************************************* +Generating : Bottom Paste + File : PCB1.GBP + + Adding Layer : Bottom Paste + + Adding Layer : Bottom Layer + + Adding Layer : Multi-Layer + + +Used DCodes : +************************************************************* + +************************************************************* +Generating : Top Paste + File : PCB1.GTP + + Adding Layer : Top Paste + + Adding Layer : Top Layer + + Adding Layer : Multi-Layer + + +Used DCodes : + D16 + D17 + D18 + D19 + D20 + D21 +************************************************************* + +************************************************************* +Generating : Bottom Solder + File : PCB1.GBS + + Adding Layer : Bottom Solder + + Adding Layer : Bottom Layer + + Adding Layer : Multi-Layer + + +Used DCodes : + D28 + D29 + D30 + D31 + D32 + D33 + D34 + D35 + D36 + D37 + D38 + D39 + D40 + D41 +************************************************************* + +************************************************************* +Generating : Top Solder + File : PCB1.GTS + + Adding Layer : Top Solder + + Adding Layer : Top Layer + + Adding Layer : Multi-Layer + + +Used DCodes : + D22 + D23 + D24 + D25 + D26 + D27 + D28 + D29 + D30 + D31 + D32 + D33 + D34 + D35 + D36 + D37 + D38 + D39 + D40 + D41 +************************************************************* + +************************************************************* +Generating : Bottom Overlay + File : PCB1.GBO + + Adding Layer : Bottom Overlay + + +Used DCodes : +************************************************************* + +************************************************************* +Generating : Top Overlay + File : PCB1.GTO + + Adding Layer : Top Overlay + + +Used DCodes : + D10 + D11 + D12 + D13 + D14 + D15 +************************************************************* + +************************************************************* +Generating : Bottom Layer + File : PCB1.GBL + + Adding Layer : Bottom Layer + + Adding Layer : Multi-Layer + + +Used DCodes : + D30 + D31 + D33 + D34 + D37 + D38 + D39 + D44 + D45 + D46 + D47 + D48 + D49 + D50 +************************************************************* + +************************************************************* +Generating : Top Layer + File : PCB1.GTL + + Adding Layer : Top Layer + + Adding Layer : Multi-Layer + + +Used DCodes : + D16 + D17 + D18 + D19 + D20 + D21 + D30 + D31 + D33 + D34 + D37 + D38 + D39 + D42 + D43 + D44 + D45 + D46 + D47 + D48 + D49 + D50 +************************************************************* + +************************************************************* +Generating : Profile + File : PCB1.GM + + +Used DCodes : + D51 +************************************************************* + diff --git a/PCB1.TXT b/PCB1.TXT new file mode 100644 index 0000000..8196bff --- /dev/null +++ b/PCB1.TXT @@ -0,0 +1,78 @@ +M48 +;Layer_Color=9474304 +;FILE_FORMAT=4:4 +METRIC,LZ +;TYPE=PLATED +T01F00S00C0.6350 +T03F00S00C0.8500 +T04F00S00C1.0000 +T05F00S00C1.2954 +T06F00S00C1.5500 +T07F00S00C1.6500 +T08F00S00C1.8542 +T09F00S00C3.2000 +% +T01 +X003683Y0004064 +X0036733Y0021773 +Y0024773 +X0039733 +Y0027773 +Y0030773 +Y0033773 +Y0036773 +Y0039773 +X0036733 +Y0036773 +Y0033773 +Y0030773 +Y0027773 +X0033733 +Y0030773 +Y0033773 +Y0036773 +Y0039773 +X0030733 +Y0036773 +Y0033773 +Y0030773 +Y0027773 +Y0024773 +X0033733 +Y0021773 +X0030733 +X0019939Y0032705 +X0046482Y0015367 +T03 +X0041741Y00063771 +X0045241 +X0016581Y003937 +X0013081 +T04 +X0055245Y0029845 +Y0032345 +T05 +X0054102Y0021717 +Y0024257 +T06 +X0025273Y0028321 +Y0033401 +Y0041021 +X0045593 +Y0030861 +Y0020701 +T07 +X0051946Y0012371 +Y0016331 +X0007998Y0014403 +Y0018363 +T08 +X0018669Y0012192 +X0023495 +X0028321 +T09 +X0055Y0005 +Y004 +X0005 +Y0005 +M30 diff --git a/PCB1.apr b/PCB1.apr new file mode 100644 index 0000000..2e0a813 --- /dev/null +++ b/PCB1.apr @@ -0,0 +1,38 @@ +D10 ROUNDED 3.937 3.937 0.000 LINE 0.000 +D11 ROUNDED 9.842 9.842 0.000 LINE 0.000 +D12 ROUNDED 7.874 7.874 0.000 LINE 0.000 +D13 ROUNDED 5.000 5.000 0.000 LINE 0.000 +D14 ROUNDED 6.000 6.000 0.000 LINE 0.000 +D15 ROUNDED 10.000 10.000 0.000 LINE 0.000 +D16 RECTANGULAR 59.055 55.118 0.000 FLASH 270.000 +D17 RECTANGULAR 96.457 88.583 0.000 FLASH 180.000 +D18 RECTANGULAR 88.583 112.205 0.000 FLASH 180.000 +D19 RECTANGULAR 57.087 47.244 0.000 FLASH 0.000 +D20 RECTANGULAR 59.055 55.118 0.000 FLASH 0.000 +D21 RECTANGULAR 88.583 110.236 0.000 FLASH 0.000 +D22 RECTANGULAR 67.055 63.118 0.000 FLASH 270.000 +D23 RECTANGULAR 104.457 96.583 0.000 FLASH 180.000 +D24 RECTANGULAR 96.583 120.205 0.000 FLASH 180.000 +D25 RECTANGULAR 65.087 55.244 0.000 FLASH 0.000 +D26 RECTANGULAR 67.055 63.118 0.000 FLASH 0.000 +D27 RECTANGULAR 96.583 118.236 0.000 FLASH 0.000 +D28 ROUNDED 133.000 133.000 0.000 FLASH 0.000 +D29 RECTANGULAR 133.000 133.000 0.000 FLASH 0.000 +D30 ROUNDED 80.000 125.000 0.000 FLASH 270.000 +D31 RECTANGULAR 61.024 61.024 0.000 FLASH 270.000 +D32 ROUNDED 78.866 78.866 0.000 FLASH 0.000 +D33 RECTANGULAR 98.425 98.425 0.000 FLASH 90.000 +D34 ROUNDED 98.425 137.795 0.000 FLASH 270.000 +D37 ROUNDED 61.024 61.024 0.000 FLASH 0.000 +D38 ROUNDED 98.425 98.425 0.000 FLASH 0.000 +D39 ROUNDED 100.000 200.000 0.000 FLASH 180.000 +D40 ROUNDED 244.220 244.220 0.000 FLASH 0.000 +D41 ROUNDED 43.000 43.000 0.000 FLASH 0.000 +D42 ROUNDED 50.000 50.000 0.000 LINE 0.000 +D43 ROUNDED 100.000 100.000 0.000 LINE 0.000 +D44 ROUNDED 125.000 125.000 0.000 FLASH 0.000 +D45 RECTANGULAR 125.000 125.000 0.000 FLASH 0.000 +D46 ROUNDED 70.866 70.866 0.000 FLASH 0.000 +D49 ROUNDED 236.220 236.220 0.000 FLASH 0.000 +D50 ROUNDED 35.000 35.000 0.000 FLASH 0.000 +D51 ROUNDED 1.000 1.000 0.000 LINE 0.000 diff --git a/Status Report.Txt b/Status Report.Txt new file mode 100644 index 0000000..288c819 --- /dev/null +++ b/Status Report.Txt @@ -0,0 +1,13 @@ +Output: NC Drill Files +Type : NC Drill +From : Project [ARC_Powerboard_2.0.PrjPcb] + Generated File[PCB1.TXT] + Generated File[PCB1-RectHoles.TXT] + Generated File[PCB1.LDP] + Generated File[PCB1.DRR] + + +Files Generated : 4 +Documents Printed : 0 + +Finished Output Generation At 7:21:25 PM On 3/11/2026