From 860bd37e831231aa10d6c791a0b1607fa4339d94 Mon Sep 17 00:00:00 2001 From: yuhun Jun Date: Fri, 29 Jul 2022 11:28:22 +0900 Subject: [PATCH 1/3] Fix the typo, xml parsing problem --- src/exec/Device_Parameter_Set.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/exec/Device_Parameter_Set.cpp b/src/exec/Device_Parameter_Set.cpp index 3e3675e0..b4798567 100644 --- a/src/exec/Device_Parameter_Set.cpp +++ b/src/exec/Device_Parameter_Set.cpp @@ -596,7 +596,7 @@ void Device_Parameter_Set::XML_deserialize(rapidxml::xml_node<> *node) } else if (strcmp(param->name(), "Static_Wearleveling_Threshold") == 0) { std::string val = param->value(); Static_Wearleveling_Threshold = std::stoul(val); - } else if (strcmp(param->name(), "Prefered_suspend_erase_time_for_read") == 0) { + } else if (strcmp(param->name(), "Preferred_suspend_erase_time_for_read") == 0) { std::string val = param->value(); Preferred_suspend_erase_time_for_read = std::stoull(val); } else if (strcmp(param->name(), "Preferred_suspend_erase_time_for_write") == 0) { From 217224c0106eb202decc01af0284c96f275cda5b Mon Sep 17 00:00:00 2001 From: yuhun Jun Date: Fri, 29 Jul 2022 11:38:13 +0900 Subject: [PATCH 2/3] Fix the initializeing parameter's order, same to caller --- src/ssd/TSU_Base.cpp | 16 ++++++++++++---- src/ssd/TSU_Base.h | 6 +++--- 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/src/ssd/TSU_Base.cpp b/src/ssd/TSU_Base.cpp index 5d199560..8623de18 100644 --- a/src/ssd/TSU_Base.cpp +++ b/src/ssd/TSU_Base.cpp @@ -7,12 +7,20 @@ namespace SSD_Components { TSU_Base* TSU_Base::_my_instance = NULL; - TSU_Base::TSU_Base(const sim_object_id_type& id, FTL* ftl, NVM_PHY_ONFI_NVDDR2* NVMController, Flash_Scheduling_Type Type, - unsigned int ChannelCount, unsigned int chip_no_per_channel, unsigned int DieNoPerChip, unsigned int PlaneNoPerDie, - bool EraseSuspensionEnabled, bool ProgramSuspensionEnabled, + TSU_Base::TSU_Base( + const sim_object_id_type& id, + FTL* ftl, + NVM_PHY_ONFI_NVDDR2* NVMController, + Flash_Scheduling_Type Type, + unsigned int ChannelCount, + unsigned int chip_no_per_channel, + unsigned int DieNoPerChip, + unsigned int PlaneNoPerDie, sim_time_type WriteReasonableSuspensionTimeForRead, sim_time_type EraseReasonableSuspensionTimeForRead, - sim_time_type EraseReasonableSuspensionTimeForWrite) + sim_time_type EraseReasonableSuspensionTimeForWrite, + bool EraseSuspensionEnabled, + bool ProgramSuspensionEnabled) : Sim_Object(id), ftl(ftl), _NVMController(NVMController), type(Type), channel_count(ChannelCount), chip_no_per_channel(chip_no_per_channel), die_no_per_chip(DieNoPerChip), plane_no_per_die(PlaneNoPerDie), eraseSuspensionEnabled(EraseSuspensionEnabled), programSuspensionEnabled(ProgramSuspensionEnabled), diff --git a/src/ssd/TSU_Base.h b/src/ssd/TSU_Base.h index 564a5f62..30b25bb8 100644 --- a/src/ssd/TSU_Base.h +++ b/src/ssd/TSU_Base.h @@ -23,11 +23,11 @@ class TSU_Base : public MQSimEngine::Sim_Object { public: TSU_Base(const sim_object_id_type &id, FTL *ftl, NVM_PHY_ONFI_NVDDR2 *NVMController, Flash_Scheduling_Type Type, - unsigned int Channel_no, unsigned int chip_no_per_channel, unsigned int DieNoPerChip, unsigned int PlaneNoPerDie, - bool EraseSuspensionEnabled, bool ProgramSuspensionEnabled, + unsigned int Channel_no, unsigned int chip_no_per_channel, unsigned int DieNoPerChip, unsigned int PlaneNoPerDie, sim_time_type WriteReasonableSuspensionTimeForRead, sim_time_type EraseReasonableSuspensionTimeForRead, - sim_time_type EraseReasonableSuspensionTimeForWrite); + sim_time_type EraseReasonableSuspensionTimeForWrite, + bool EraseSuspensionEnabled, bool ProgramSuspensionEnabled); virtual ~TSU_Base(); void Setup_triggers(); From a3c8d55e69cffa03a89088da56fa4338615e9ca0 Mon Sep 17 00:00:00 2001 From: yuhun Jun Date: Fri, 29 Jul 2022 11:43:47 +0900 Subject: [PATCH 3/3] add suspendlock, for prohibiting suspend to idle chip --- src/ssd/NVM_PHY_ONFI.h | 1 + src/ssd/NVM_PHY_ONFI_NVDDR2.cpp | 16 ++++++++++++++++ src/ssd/NVM_PHY_ONFI_NVDDR2.h | 4 +++- src/ssd/TSU_Priority_OutOfOrder.cpp | 8 ++++++++ 4 files changed, 28 insertions(+), 1 deletion(-) diff --git a/src/ssd/NVM_PHY_ONFI.h b/src/ssd/NVM_PHY_ONFI.h index fe4f3c7e..73096bb8 100644 --- a/src/ssd/NVM_PHY_ONFI.h +++ b/src/ssd/NVM_PHY_ONFI.h @@ -30,6 +30,7 @@ namespace SSD_Components virtual LPA_type Get_metadata(flash_channel_ID_type channe_id, flash_chip_ID_type chip_id, flash_die_ID_type die_id, flash_plane_ID_type plane_id, flash_block_ID_type block_id, flash_page_ID_type page_id) = 0;//A simplification to decrease the complexity of GC execution! The GC unit may need to know the metadata of a page to decide if a page is valid or invalid. virtual bool HasSuspendedCommand(NVM::FlashMemory::Flash_Chip* chip) = 0; virtual ChipStatus GetChipStatus(NVM::FlashMemory::Flash_Chip* chip) = 0; + virtual bool CheckSuspendLock(NVM::FlashMemory::Flash_Chip* chip) = 0; virtual sim_time_type Expected_finish_time(NVM::FlashMemory::Flash_Chip* chip) = 0; /// Provides communication between controller and NVM chips for a simple read/write/erase command. virtual void Send_command_to_chip(std::list& transactionList) = 0; diff --git a/src/ssd/NVM_PHY_ONFI_NVDDR2.cpp b/src/ssd/NVM_PHY_ONFI_NVDDR2.cpp index 93403acb..bb81ee59 100644 --- a/src/ssd/NVM_PHY_ONFI_NVDDR2.cpp +++ b/src/ssd/NVM_PHY_ONFI_NVDDR2.cpp @@ -23,6 +23,7 @@ namespace SSD_Components { bookKeepingTable[channelID][chipID].Last_transfer_finish_time = T0; bookKeepingTable[channelID][chipID].Die_book_keeping_records = new DieBookKeepingEntry[DieNoPerChip]; bookKeepingTable[channelID][chipID].Status = ChipStatus::IDLE; + bookKeepingTable[channelID][chipID].SuspendLock = false; bookKeepingTable[channelID][chipID].HasSuspend = false; bookKeepingTable[channelID][chipID].WaitingReadTXCount = 0; bookKeepingTable[channelID][chipID].No_of_active_dies = 0; @@ -84,6 +85,11 @@ namespace SSD_Components { { return bookKeepingTable[chip->ChannelID][chip->ChipID].Status; } + + inline bool NVM_PHY_ONFI_NVDDR2::CheckSuspendLock(NVM::FlashMemory::Flash_Chip* chip) + { + return bookKeepingTable[chip->ChannelID][chip->ChipID].SuspendLock; + } inline sim_time_type NVM_PHY_ONFI_NVDDR2::Expected_finish_time(NVM::FlashMemory::Flash_Chip* chip) { @@ -162,6 +168,10 @@ namespace SSD_Components { if (chipBKE->OngoingDieCMDTransfers.size()) { chipBKE->PrepareSuspend(); } + chipBKE->No_of_active_dies--; + if (chipBKE->No_of_active_dies == 0) + chipBKE->Status = ChipStatus::IDLE; + } else { PRINT_ERROR("Read suspension is not supported!") } @@ -574,6 +584,9 @@ namespace SSD_Components { case CMD_PROGRAM_PAGE_COPYBACK_MULTIPLANE: { DEBUG("Chip " << chip->ChannelID << ", " << chip->ChipID << ": finished program command") + + chipBKE->SuspendLock = true; + int i = 0; for (std::list::iterator it = dieBKE->ActiveTransactions.begin(); it != dieBKE->ActiveTransactions.end(); it++, i++) @@ -581,6 +594,9 @@ namespace SSD_Components { ((NVM_Transaction_Flash_WR*)(*it))->Content = command->Meta_data[i].LPA; _my_instance->broadcastTransactionServicedSignal(*it); } + + chipBKE->SuspendLock = false; + dieBKE->ActiveTransactions.clear(); dieBKE->ClearCommand(); diff --git a/src/ssd/NVM_PHY_ONFI_NVDDR2.h b/src/ssd/NVM_PHY_ONFI_NVDDR2.h index be51ac2c..b8662475 100644 --- a/src/ssd/NVM_PHY_ONFI_NVDDR2.h +++ b/src/ssd/NVM_PHY_ONFI_NVDDR2.h @@ -77,12 +77,13 @@ namespace SSD_Components sim_time_type Expected_command_exec_finish_time; sim_time_type Last_transfer_finish_time; bool HasSuspend; + bool SuspendLock; //void suspend on relate read std::queue OngoingDieCMDTransfers; unsigned int WaitingReadTXCount; unsigned int No_of_active_dies; void PrepareSuspend() { HasSuspend = true; No_of_active_dies = 0; } - void PrepareResume() { HasSuspend = false; } + void PrepareResume() { HasSuspend = false; No_of_active_dies++;} }; class NVM_PHY_ONFI_NVDDR2 : public NVM_PHY_ONFI @@ -108,6 +109,7 @@ namespace SSD_Components NVM_Transaction_Flash* Is_chip_busy_with_stream(NVM_Transaction_Flash* transaction); bool Is_chip_busy(NVM_Transaction_Flash* transaction); void Change_memory_status_preconditioning(const NVM::NVM_Memory_Address* address, const void* status_info); + bool CheckSuspendLock(NVM::FlashMemory::Flash_Chip* chip); private: void transfer_read_data_from_chip(ChipBookKeepingEntry* chipBKE, DieBookKeepingEntry* dieBKE, NVM_Transaction_Flash* tr); void perform_interleaved_cmd_data_transfer(NVM::FlashMemory::Flash_Chip* chip, DieBookKeepingEntry* bookKeepingEntry); diff --git a/src/ssd/TSU_Priority_OutOfOrder.cpp b/src/ssd/TSU_Priority_OutOfOrder.cpp index a6b29b79..40123dab 100644 --- a/src/ssd/TSU_Priority_OutOfOrder.cpp +++ b/src/ssd/TSU_Priority_OutOfOrder.cpp @@ -406,6 +406,9 @@ bool TSU_Priority_OutOfOrder::service_read_transaction(NVM::FlashMemory::Flash_C case ChipStatus::IDLE: break; case ChipStatus::WRITING: + if (_NVMController->CheckSuspendLock(chip)) + return false; + if (!programSuspensionEnabled || _NVMController->HasSuspendedCommand(chip)) { return false; @@ -415,7 +418,11 @@ bool TSU_Priority_OutOfOrder::service_read_transaction(NVM::FlashMemory::Flash_C return false; } suspensionRequired = true; + break; case ChipStatus::ERASING: + if (_NVMController->CheckSuspendLock(chip)) + return false; + if (!eraseSuspensionEnabled || _NVMController->HasSuspendedCommand(chip)) { return false; @@ -425,6 +432,7 @@ bool TSU_Priority_OutOfOrder::service_read_transaction(NVM::FlashMemory::Flash_C return false; } suspensionRequired = true; + break; default: return false; }